Well, I think the main reason that the last level (shared) cache is a WT cache is because you don't need to enforce coherence on a shared cache. The bus that connects the private caches to the last level shared cache provides an ordering on requests.
I can't really speak to the inclusivity issues, but I think that's the rationale for why the LLC is a WT cache instead of a MESI cache ... On Tue, May 10, 2011 at 3:32 PM, Yingying Tian <[email protected]> wrote: > To whom it may concern, > > Has anyone successfully run MARSS with all caches defined as MESICache? In > the original code of memoryHierarchy.cpp, the L2 cache, which is the shared > last level cache in a 2-level cache hierarchy, is defined as SimpleWTCache. > If the L3 cache is enabled, it is also defined as SimpleWTCache. What is > the reason to define the last level cache to be SimpleWTCache? I don't think > SimpleWTCache (which is defined in cacheController.*) implemented inclusive > cache property. However, when I modified the code from SimpleWTCache to > MESICache (simply change the namespace used), the simulator got stuck. > Sometimes it printed out someStructIsFull and sometimes nothing printed out. > I tried both single core checkpoint with 429.mcf in SPEC2006 and different > 2-core checkpoints in SPEC2006 benchmarks. All of them failed. > > Also I tried to modify cacheController.cpp myself to handle inclusive > issues. However, the simulator was stuck, too. Has anyone encountered the > same problem? Or run MARSS successfully without SimpleWTCache? Could you > please give me any suggestion? > > > Thanks, > Yingying > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
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