When Marss is in the emulation mode (i.e., when it is running QEMU only and not PTLsim), do the guest's memory operations still go through the cache hierarchy model? Or are they directly satisfied by the guest's memory?
If the answer is the former, then QEMU needs to be modified to use the cache hierarchy model. Could you point out where the code changes in QEMU are? If the answer is the latter, does it mean that the switch from simulation mode to emulation mode would involve some sort of draining of the cache hierarchy to memory to ensure that all modified cache lines are written back to memory? Could you point out where the code for doing that is? Thanks! - Ching Tsun
_______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
