On Thu, Oct 27, 2011 at 4:21 PM, sparsh mittal <[email protected]>wrote:
> Hello > I came across this comment: > > /* > * Flushin of the caches is disabled currently because we need to > * implement a logic where every cache will check physaddr's cache line > * address with pending requests and flush them. > */ > > I want to implement flushing of write-back cache in cacheController.cpp. > Flushing is done during simulation itself, such as after 1M instruction. > Can you give some pointers. > > I think I need to check whether dirty; then call send-update-message .. > But > 1. What about dependent entries? > Means that new cache requests from CPU? I would suggest that you disable accepting any CPU requests untill the flushing is complete. This will keep things simple and will let CPU continue execution if it doesn't require any cache access. In case of existing dependent entries, first you need to finish serving those and when there is no pending entry left, then you start flushing the cache. 2. It will take multiple cycles. what happens during that time? > The flushing algorithm has to be event driven where it has to wait for a free queue entry to flush further. Also if you'r thinking about CPU delay, if you disable accepting any CPU requests then you don't have to worry about the timing. - Avadh Thanks and Regards > Sparsh Mittal > > > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
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