On Tue, Nov 22, 2011 at 4:44 PM, Li, Dong <[email protected]> wrote: > Hi, guys.**** > > It looks like only one memory controller (MC) is allowed? Can we configure > the number of MC by the configuration file?**** > > ** >
Yes currently only one controller is allowed. To enable multiple memory controllers, as per my understanding, we need to divide the memory among multiple controllers and provide some type of interconnect (like QPI in intel chips) to fwd request to correct controller. This is not a huge task, its just that its not on top of the requirement list :) - Avadh ** > > Thank you.**** > > ** ** > > -Dong**** > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
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