On Wed, Dec 7, 2011 at 6:37 PM, Sungjin Park <[email protected]> wrote:
> Hello, > > I want to add new instuctions in MARSS in order to give new features to > x86 CPU. > To do this, I have been looking into MARSS source code. For smooth > analysis, I want to know the big picture of the relation between MARSS and > QEMU. What I want to know are the same as the follow. > > - Which one does decode x86 instructions? > According to the PTLsim manual, it looks like PTLsim only executes > translated ops. If so, decoding x86 instructions is executed in QEMU? > Both QEMU and PTLsim based simulation model have their own decoder. So if you want to support some new instruction you'll have to implement it in both. The good part is that both QEMU and PTLsim uses micro-ops like decoder so once you understand few basic thing it will be easy to add new instructions. > > - How can I raise an exception in PTLsim? > You can raise an exception in simulation model using 'propagate_x86_exception' function call. Take a look at either ooo.cpp or atomcore.cpp files. Remember that you can call this function *only* in 'handle_exception' (its current location) otherwise it will corrupt the pipeline and also CPU registers. - Avadh > I'm planning to modify cache mechanism. After that, if there are some > abnormal conditions, I want to raise exception. Of course, I will modify > the linux kernel to deal with this exception. In my thought, abnormal case > in cache is caused in PTLsim. Therefore, exception is passed from PTLsim to > QEMU. > > Regards, > > Sungjin > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
_______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
