Hi Paul,

Thank you for your help. I will try to figure it out. If there are some
questions, I may trouble you more. Thanks in advance.


Thanks,
Yingying

On Tue, Mar 6, 2012 at 8:04 PM, Paul Rosenfeld <[email protected]> wrote:

> I'm hazy on the details at this point since it's been a while since I've
> looked at the code, but the main function you want is
> in ptlsim/sim/ptl-qemu.cpp:
>
> int Context::copy_from_user(void * target, Waddr source, int bytes,
> PageFaultErrorCode& pfec, Waddr& faultaddr, bool forexec)
>
> This function calls the low level ldub_user and ldub_kernel functions
> which actually go into QEMU's memory space and pull out the data. The
> funtion then copies the bytes to the target buffer that you provide.
>
> You can grep around the code to see an example for how to use it. One such
> example can be found when marss loads instructions to be executed into the
> trace buffer in ptlsim/x86/decode-core.cpp:1998
>
> Hopefully that's enough information to get you started.
>
>
>
>
> On Tue, Mar 6, 2012 at 8:28 PM, Yingying Tian <[email protected]> wrote:
>
>> Hi Paul,
>>
>> Thank you for your reply. Yes I'd like to know more about accessing real
>> data on Marss. It would be great if you could find the function and related
>> information for me. Thank you in advance.
>>
>>
>> Thanks,
>> Yingying
>>
>>
>> On Tue, Mar 6, 2012 at 6:43 PM, Paul Rosenfeld <[email protected]>wrote:
>>
>>> The caches only store tag information. The ptlsim portion of the
>>> simulator mostly deals with timings, so the model only really needs to know
>>> if there was a cache hit or a cache miss.
>>>
>>> The data is available by calling into QEMU. There are some low level
>>> load functions that could be used to load the actual data given. At the
>>> moment I'm having trouble remembering which type of address you need (I
>>> believe it is host virtual) to get access to this data. If you need more
>>> detail I can try to find the function for you.
>>>
>>> On Tue, Mar 6, 2012 at 5:54 PM, Yingying Tian <[email protected]> wrote:
>>>
>>>> To whom it may concern,
>>>>
>>>> Is it possible to get the real data (cache block) fetched from the main
>>>> memory? As I know so far, each request contains core-id, physical address,
>>>> instruction/data type, etc. If I expect to check the content of cache
>>>> blocks, are there any ways to get the data information?
>>>>
>>>>
>>>> Thanks,
>>>> Yingying
>>>>
>>>> _______________________________________________
>>>> http://www.marss86.org
>>>> Marss86-Devel mailing list
>>>> [email protected]
>>>> https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
>>>>
>>>>
>>>
>>
>
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