[marss86-devel] someStructIsFull

[email protected] Tue, 20 Mar 2012 08:08:45 -0700

Hello,

I am trying to improve the simulation bandwidth with Marss. Therefore, Iincreased the memory controller queue size (MEM_REQ_NUM = 128) andnumber of banks. However, I got the following error:

Completed 753000 cycles, 2405977 commits: 42995 Hz,129195 insns/sec: rip 000000000042ea87 000000000040221b 00000000004016ce0000000000411bf0qemu-system-x86_64:ptlsim/build/core/ooo-core/ooo.cpp:870: virtual boolooo::OooCore::runcycle(): Assertion `0' failed.

And the log file shows someStructIsFull_. Part of the log file islisted. SO I guess the cpu controller queue size is too small? Couldanyone give some suggestions? thank you very much!


Kunior

.....................
---End Cache-Controller : L1_D_1
---Cache-Controller: L1_D_2

Queue : (12 entries):Request{Memory Request: core[2] thread[0]address[0x00010ab76aa8] robid[0] init-cycle[3575801] ref-counter[5]op-type[memory_op_write] isData[1] ownerUUID[3460813] ownerRIP[0x40164a]History[ {+core_2_cont} {+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1}{+L1_I_2} {+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0}{-L1_I_1} {-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ]Signal[ ooo_2_2-dcache-wakeup] } idx[109] sender[p2p_core_L1_D_2]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109bd87b8]robid[0] init-cycle[55166665] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808360] ownerRIP[0x401be9] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } idx[90] sender[p2p_core_L1_D_2]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[2] thread[0] address[0x00010955b358]robid[0] init-cycle[55166676] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808402] ownerRIP[0x401c83] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } idx[253] sender[p2p_core_L1_D_2]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109a4df60]robid[0] init-cycle[55166677] ref-counter[4] op-type[memory_op_write]isData[1] ownerUUID[48808407] ownerRIP[0x401c98] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} ] Signal[ ooo_2_2-dcache-wakeup]} idx[92] sender[p2p_core_L1_D_2] sendTo[split_bus_00]line[none]depends[-1] waitFor[-1] eventFlags[00000000] annuled[0]evicting[0] isSnoop[0] isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109bd8888]robid[0] init-cycle[55166679] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808415] ownerRIP[0x401cae] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[55]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109bd0b98]robid[0] init-cycle[55166682] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808425] ownerRIP[0x401cda] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[62]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x00010955f208]robid[0] init-cycle[55166684] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808435] ownerRIP[0x401d06] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[63]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109a51e10]robid[0] init-cycle[55166688] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808449] ownerRIP[0x401d2f] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[132]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109557518]robid[0] init-cycle[55166689] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808454] ownerRIP[0x401d45] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[115]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109a4a120]robid[0] init-cycle[55166690] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808459] ownerRIP[0x401d5b] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[73]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x00010955b448]robid[0] init-cycle[55166691] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808464] ownerRIP[0x401d70] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[252]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]

Request{Memory Request: core[2] thread[0] address[0x000109a4e050]robid[0] init-cycle[55166693] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808469] ownerRIP[0x401d88] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } idx[97]sender[p2p_core_L1_D_2] sendTo[split_bus_00] line[none]depends[-1]waitFor[-1] eventFlags[00000000] annuled[0] evicting[0] isSnoop[0]isShared[0] responseData[0]




---End Cache-Controller : L1_D_2
---Cache-Controller: L1_D_3

Queue : (4 entries):Request{Memory Request: core[3] thread[0]address[0x0000d24a8880] robid[112] init-cycle[55166569] ref-counter[5]op-type[memory_op_read] isData[1] ownerUUID[40651938] ownerRIP[0x411be2]History[ {+core_3_cont} {+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1}{+L1_I_2} {+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0}{-L1_I_1} {-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ]Signal[ ooo_3_3-dcache-wakeup] } idx[126] sender[p2p_core_L1_D_3]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a8910]robid[117] init-cycle[55166572] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651943] ownerRIP[0x411bf0] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[35] sender[p2p_core_L1_D_3]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a8940]robid[1] init-cycle[55166574] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651955] ownerRIP[0x411c14] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[245] sender[p2p_core_L1_D_3]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a88e0]robid[13] init-cycle[55166576] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651967] ownerRIP[0x411c3d] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[56] sender[p2p_core_L1_D_3]sendTo[split_bus_00] line[none]depends[-1] waitFor[-1]eventFlags[00000000] annuled[0] evicting[0] isSnoop[0] isShared[0]responseData[0]




---End Cache-Controller : L1_D_3
---Cache-Controller: L2_0

Queue : (16 entries):Request{Memory Request: core[1] thread[0]address[0x0000b7692100] robid[0] init-cycle[3576058] ref-counter[5]op-type[memory_op_write] isData[1] ownerUUID[6240615]ownerRIP[0xffffffff8116faf2] History[ {+core_1_cont} {+L1_D_1}{+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3} {+L2_0}{+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2} {-L1_I_3}{-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ ooo_1_1-dcache-wakeup]} idx[86] sender[split_bus_00] sendTo[p2p_L2_0_MEM_00] depends[-1]eventFlags[000000001] annuled[0] prefetch[0] pfComp[0]

Request{Memory Request: core[1] thread[0] address[0x0000b7692140]robid[0] init-cycle[3576061] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240627] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } idx[27] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[1] thread[0] address[0x0000b7692200]robid[0] init-cycle[3576075] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240663] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } idx[38] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[1] thread[0] address[0x0000b7692300]robid[0] init-cycle[3576095] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240711] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } idx[84] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[2] thread[0] address[0x00010ab76aa8]robid[0] init-cycle[3575801] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[3460813] ownerRIP[0x40164a] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } idx[57] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a8880]robid[112] init-cycle[55166569] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651938] ownerRIP[0x411be2] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[19] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[0] thread[0] address[0x0000d2ca7378]robid[116] init-cycle[55166574] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712081] ownerRIP[0x43a122] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } idx[16] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a8910]robid[117] init-cycle[55166572] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651943] ownerRIP[0x411bf0] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[22] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a8940]robid[1] init-cycle[55166574] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651955] ownerRIP[0x411c14] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[90] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[3] thread[0] address[0x0000d24a88e0]robid[13] init-cycle[55166576] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651967] ownerRIP[0x411c3d] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } idx[114] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[0] thread[0] address[0x00010004e970]robid[15] init-cycle[55166601] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712108] ownerRIP[0x43a182] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } idx[72] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[0] thread[0] address[0x00011b3ab378]robid[46] init-cycle[55166653] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712139] ownerRIP[0x43a163] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } idx[76] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[2] thread[0] address[0x000109bd87b8]robid[0] init-cycle[55166665] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808360] ownerRIP[0x401be9] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } idx[20] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[2] thread[0] address[0x00010955b358]robid[0] init-cycle[55166676] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808402] ownerRIP[0x401c83] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } idx[66] sender[split_bus_00]sendTo[p2p_L2_0_MEM_00] depends[-1] eventFlags[000000001] annuled[0]prefetch[0] pfComp[0]

Request{Memory Request: core[2] thread[0] address[0x000109a4df60]robid[0] init-cycle[55166677] ref-counter[4] op-type[memory_op_write]isData[1] ownerUUID[48808407] ownerRIP[0x401c98] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} ] Signal[ ooo_2_2-dcache-wakeup]} idx[63] sender[split_bus_00] sendTo[none] depends[-1]eventFlags[010000000] annuled[0] prefetch[0] pfComp[0]

Request{Memory Request: core[0] thread[0] address[0x00010004d7b8]robid[66] init-cycle[55166706] ref-counter[4] op-type[memory_op_read]isData[1] ownerUUID[28712031] ownerRIP[0x43a18b] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} ] Signal[ ooo_0_0-dcache-wakeup]} idx[8] sender[split_bus_00] sendTo[none] depends[-1]eventFlags[010000000] annuled[0] prefetch[0] pfComp[0]




---End Cache-Controller : L2_0
---Memory-Controller: MEM_0

Queue : (17 entries):Request{Memory Request: core[2] thread[0]address[0x00010a96be40] robid[0] init-cycle[3574521] ref-counter[1]op-type[memory_op_update] isData[1] ownerUUID[3460548]ownerRIP[0x401613] History[ {+L2_0} {+MEM_0} {-L2_0} ] Signal[ooo_1_1-dcache-wakeup] } depends[-1] annuled[0] inUse[1]

Request{Memory Request: core[1] thread[0] address[0x0000b7692100]robid[0] init-cycle[3576058] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240615] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } depends[-1] annuled[0] inUse[1]

Request{Memory Request: core[3] thread[0] address[0x00010ab4e940]robid[65] init-cycle[3576086] ref-counter[1] op-type[memory_op_update]isData[1] ownerUUID[2841304] ownerRIP[0x411c14] History[ {+L2_0}{+MEM_0} {-L2_0} ] Signal[ ooo_1_1-dcache-wakeup] } depends[-1]annuled[0] inUse[1]

Request{Memory Request: core[2] thread[0] address[0x00010a476740]robid[0] init-cycle[3574714] ref-counter[1] op-type[memory_op_update]isData[1] ownerUUID[3460593] ownerRIP[0x4015f5] History[ {+L2_0}{+MEM_0} {-L2_0} ] Signal[ ooo_1_1-dcache-wakeup] } depends[-1]annuled[0] inUse[1]




---End Memory-Controller: MEM_0
::Interconnects::
--P2P Interconnect: p2p_core_L1_I_0
--P2P Interconnect: p2p_core_L1_I_1
--P2P Interconnect: p2p_core_L1_I_2
--P2P Interconnect: p2p_core_L1_I_3
--P2P Interconnect: p2p_core_L1_D_0
--P2P Interconnect: p2p_core_L1_D_1
--P2P Interconnect: p2p_core_L1_D_2
--P2P Interconnect: p2p_core_L1_D_3
--P2P Interconnect: p2p_L2_0_MEM_00
--Bus-Interconnect: split_bus_00
Controller Queue:
(0 entries):
Controller Queue:
(0 entries):
Controller Queue:
(0 entries):
Controller Queue:
(0 entries):
Controller Queue:
(0 entries):
Controller Queue:

(1 entries):request{Memory Request: core[0] thread[0]address[0x00011c139778] robid[63] init-cycle[55166716] ref-counter[3]op-type[memory_op_read] isData[1] ownerUUID[28712156] ownerRIP[0x43a10f]History[ {+core_0_cont} {+L1_D_0} ] Signal[ ooo_0_0-dcache-wakeup] }hasData[0]


Controller Queue:
(0 entries):
Controller Queue:

(9 entries):request{Memory Request: core[2] thread[0]address[0x000109bd8888] robid[0] init-cycle[55166679] ref-counter[3]op-type[memory_op_write] isData[1] ownerUUID[48808415]ownerRIP[0x401cae] History[ {+core_2_cont} {+L1_D_2} ] Signal[ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109bd0b98]robid[0] init-cycle[55166682] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808425] ownerRIP[0x401cda] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x00010955f208]robid[0] init-cycle[55166684] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808435] ownerRIP[0x401d06] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109a51e10]robid[0] init-cycle[55166688] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808449] ownerRIP[0x401d2f] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109557518]robid[0] init-cycle[55166689] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808454] ownerRIP[0x401d45] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109a4a120]robid[0] init-cycle[55166690] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808459] ownerRIP[0x401d5b] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x00010955b448]robid[0] init-cycle[55166691] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808464] ownerRIP[0x401d70] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109a4e050]robid[0] init-cycle[55166693] ref-counter[3] op-type[memory_op_write]isData[1] ownerUUID[48808469] ownerRIP[0x401d88] History[ {+core_2_cont}{+L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[0]request{Memory Request: core[2] thread[0] address[0x000109bd69c0]robid[0] init-cycle[55166672] ref-counter[1] op-type[memory_op_update]isData[1] ownerUUID[48808387] ownerRIP[0x401c4c] History[ {+L1_D_2}{-L1_D_2} ] Signal[ ooo_2_2-dcache-wakeup] } hasData[1]


Controller Queue:
(0 entries):

Pending Request: (16 entries):request{Memory Request: core[1] thread[0]address[0x0000b7692100] robid[0] init-cycle[3576058] ref-counter[5]op-type[memory_op_write] isData[1] ownerUUID[6240615]ownerRIP[0xffffffff8116faf2] History[ {+core_1_cont} {+L1_D_1}{+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3} {+L2_0}{+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2} {-L1_I_3}{-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ ooo_1_1-dcache-wakeup]} shared[0]hasData[0]responseReceived[Array of 9 elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[3576167]

request{Memory Request: core[1] thread[0] address[0x0000b7692140]robid[0] init-cycle[3576061] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240627] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[3576188]

request{Memory Request: core[1] thread[0] address[0x0000b7692200]robid[0] init-cycle[3576075] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240663] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[3576230]

request{Memory Request: core[1] thread[0] address[0x0000b7692300]robid[0] init-cycle[3576095] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[6240711] ownerRIP[0xffffffff8116faf2] History[{+core_1_cont} {+L1_D_1} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2}{+L1_I_3} {+L2_0} {+L1_D_0} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1}{-L1_I_2} {-L1_I_3} {-L1_D_0} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_1_1-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[3576286]

request{Memory Request: core[2] thread[0] address[0x00010ab76aa8]robid[0] init-cycle[3575801] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[3460813] ownerRIP[0x40164a] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[3576412]

request{Memory Request: core[3] thread[0] address[0x0000d24a8880]robid[112] init-cycle[55166569] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651938] ownerRIP[0x411be2] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166579]

request{Memory Request: core[0] thread[0] address[0x0000d2ca7378]robid[116] init-cycle[55166574] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712081] ownerRIP[0x43a122] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166586]

request{Memory Request: core[3] thread[0] address[0x0000d24a8910]robid[117] init-cycle[55166572] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651943] ownerRIP[0x411bf0] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166593]

request{Memory Request: core[3] thread[0] address[0x0000d24a8940]robid[1] init-cycle[55166574] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651955] ownerRIP[0x411c14] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166600]

request{Memory Request: core[3] thread[0] address[0x0000d24a88e0]robid[13] init-cycle[55166576] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[40651967] ownerRIP[0x411c3d] History[ {+core_3_cont}{+L1_D_3} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_2} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_2} {+MEM_0} ] Signal[ooo_3_3-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166607]

request{Memory Request: core[0] thread[0] address[0x00010004e970]robid[15] init-cycle[55166601] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712108] ownerRIP[0x43a182] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166614]

request{Memory Request: core[0] thread[0] address[0x00011b3ab378]robid[46] init-cycle[55166653] ref-counter[5] op-type[memory_op_read]isData[1] ownerUUID[28712139] ownerRIP[0x43a163] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} {+MEM_0} ] Signal[ooo_0_0-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166670]

request{Memory Request: core[2] thread[0] address[0x000109bd87b8]robid[0] init-cycle[55166665] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808360] ownerRIP[0x401be9] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166684]

request{Memory Request: core[2] thread[0] address[0x00010955b358]robid[0] init-cycle[55166676] ref-counter[5] op-type[memory_op_write]isData[1] ownerUUID[48808402] ownerRIP[0x401c83] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} {+MEM_0} ] Signal[ooo_2_2-dcache-wakeup] } shared[0]hasData[0]responseReceived[Array of 9elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166705]

request{Memory Request: core[2] thread[0] address[0x000109a4df60]robid[0] init-cycle[55166677] ref-counter[4] op-type[memory_op_write]isData[1] ownerUUID[48808407] ownerRIP[0x401c98] History[ {+core_2_cont}{+L1_D_2} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_0} {+L1_D_1} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_0} {-L1_D_1} {-L1_D_3} ] Signal[ ooo_2_2-dcache-wakeup]} shared[0]hasData[0]responseReceived[Array of 9 elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166712]

request{Memory Request: core[0] thread[0] address[0x00010004d7b8]robid[66] init-cycle[55166706] ref-counter[4] op-type[memory_op_read]isData[1] ownerUUID[28712031] ownerRIP[0x43a18b] History[ {+core_0_cont}{+L1_D_0} {+split_bus_00} {+L1_I_0} {+L1_I_1} {+L1_I_2} {+L1_I_3}{+L2_0} {+L1_D_1} {+L1_D_2} {+L1_D_3} {-L1_I_0} {-L1_I_1} {-L1_I_2}{-L1_I_3} {-L1_D_1} {-L1_D_2} {-L1_D_3} ] Signal[ ooo_0_0-dcache-wakeup]} shared[0]hasData[0]responseReceived[Array of 9 elements (16 reserved):

[0]: 1
[1]: 1
[2]: 1
[3]: 1
[4]: 0
[5]: 1
[6]: 1
[7]: 1
[8]: 1
]initCycle[55166719]


::someStructIsFull_: 1


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