On Thu, Aug 2, 2012 at 9:42 PM, Alireza Haghdoost <[email protected]>wrote:
> Hello > > I was wondering if it is possible to only simulate memory hierarchy > (caches + mem controller) and use emulation mode to execute instructions ? > I am not interested in cycle accurate processor statistics. Is it possible > to reduce simulation time by turning off cycle accurate OoO processor > simulation. > > Its not possible at this point. You can use 'atom' core model which is about 1.5x faster than OoO. But keep in mind that memory interactions with OoO are much different than in in-order mode because of out-of-order issues and issues from wrong path. It always depends on the type of benchmark but still its an important factor to consider behavior of caches, specially L1 caches. - Avadh > Thanks > Alireza > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
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