On Wed, Aug 22, 2012 at 2:16 AM, Yongbing Huang <[email protected]>wrote:
> Hi,**** > > ** ** > > In the cache configuration files such as l2_cache.conf, there is > a parameter “LATENCY” for each level. What is the unit of the parameter, > CPU cycle or ns? I guess it is CPU cycle for caches, and ns for memory > option after reading the source codes. If I am right, the latencies for L2 > (5 cycles) and L3 cache (8 cycles) shown in the example configuration, have > big difference from real machine which are about 10 cycles for L2 cache and > about 38 cycles in Nehalem architecture. Since most people use the default > configuration, it is valuable to make sure of this issue.**** > > ** > Yes they are CPU cycles. Can you share the document/webpage from where you get 10 cycles and 38 cycles for nehalem? We have done some calibration on real hardware and simulator using lmbench and found out that configuration L2 with 6 cycles and L3 (12MB) with 27 cycles matches very well. Remember that in marss cache latency are not flat, meaning that these latency only represent delay in accessing cache storage, on top of that each cache access has variable dynamic delay of queuing, port access and dependency management. Thanks for pointing out these values, in next release we will release 'nehalem' config file that try to model nehalem architecture map some of the delays from our study. - Avadh > ** > > Thanks.**** > > ** ** > > -Yongbing Huang**** > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel > >
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