The way the address mapping works is that it truncates the lower bits of the address since it assumes cache line alignment. In theory there shouldn't be any bits there for a cache line fill so I put the warning there to let the user know that the lower bits will be ignored. However, whether the warning is there or not doesn't change the behavior of DRAMSim.
On Thu, Apr 18, 2013 at 12:07 PM, Mansour <[email protected]> wrote: > Thanks again Paul. > I just was worried about the correctness of the simulations. > > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel >
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