Hi Stephan, I have tried merging one of my branches to test it out with your ASF branch, but my code is based on a newer commit, so I royally screwed up the merge (I'm out of my element when working outside of the cache/* code).
I'm curious about the problems you encountered in the memory hierarchy code. Could you elaborate on the kinds of problems you ran into? Are the memory hierarchy bugfixes in a few commits or are they spread out among many commits? I'd be interested in trying to incorporate them to see if they make some of our simulation problems go away. Thanks, Paul On Sun, Aug 4, 2013 at 4:54 PM, Stephan Diestelhorst < [email protected]> wrote: > Hi PTLsim, Marss86 and TM people, > this is a quick announcement that I have made available my latest code > that adds AMD's ASF instructions [1] to the Marss86 simulator [2] at > > https://bitbucket.org/stephand/marss86-asf/commits/branch/asf_ptlsim_merge > > This is based on earlier work [3], but improves it in multiple ways: > > - easier to use and set up, because it is based on QEMU > - higher fidelity, much more detailed memory hierarchy > - extensions to ASF, which we discuss in current academic publications > [4] > > A few things are missing (LLB support, ASF release instruction), but > things work pretty well. > > To the upstream Marss86 people I must apologise for keeping this off the > upstream development for so long. However, I have fixed some very nasty > bugs in the memory hierarchy (deadlocks, mostly) that you might be > interested in. > > I hope this is useful for "those skilled in the art" :-) If it is, I > would greatly appreciate if you could cite [3] and [4]. > > Disclaimer: This is not a product, nor endorsed by any company. > > Best, > Stephan > > [1] http://developer.amd.com/assets/45432-ASF_Spec_2.1.pdf > > http://developer.amd.com/community/blog/evaluation-of-the-advanced-synchronization-facility-asf/ > Dave Christie, Jae-Woong Chung, Stephan Diestelhorst, Michael > Hohmuth, Martin Pohlack, Christof Fetzer, Martin Nowack, Torvald > Riegel, Pascal Felber, Patrick Marlier, Etienne Riviere: Evaluation > of AMD's advanced synchronization facility within a complete > transactional memory stack. EuroSys 2010: 27-40 > > [2] http://www.marss86.org/~marss86/index.php/Home > > [3] http://www.velox-project.eu/software/ptlsim-asf > AMD64.org link is offline :-( > > [4] Stephan Diestelhorst, Martin Nowack, Michael F. Spear, Christof > Fetzer: Brief announcement: between all and nothing - versatile > aborts in hardware transactional memory. SPAA 2013: 108-110 > > > _______________________________________________ > http://www.marss86.org > Marss86-Devel mailing list > [email protected] > https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel >
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