Hello, If anyone has tried creating a unified L2 TLB structure any inputs in this regard would be much appreciated.
Thanks in advance I found that newer QEMU versions have support for L2 TLB and multiple page sizes. The QEMU version (0.14.1) does not have this support. Does this limit Marss86 from not being able to create L2 TLB and support multiple page sizes? If so how can I compile Marss with newer QEMU versions? Thanks, Adarsh ----- Original Message ----- From: "Adarsh Patil" <[email protected]> To: [email protected] Sent: Monday, August 17, 2015 11:34:43 AM Subject: [marss86-devel] Level 2 TLB and hugepages Hello, I am trying to enhance the current TLB structures by adding the following: 1) L2 TLB that supports 4KB pages 2) L1 and L2 TLB that supports 2MB pages How do I define these structures (size, lookup, replacement, shootdown) and the associated latency for accessing these? I am using a kernel that supports transparent Huge Pages (THP), how do I differentiate the lookup for a 4KB page vs a huge page? Regards, Adarsh Patil Indian Institute of Science Bangalore -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. _______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel -- This message has been scanned for viruses and dangerous content by MailScanner, and is believed to be clean. _______________________________________________ http://www.marss86.org Marss86-Devel mailing list [email protected] https://www.cs.binghamton.edu/mailman/listinfo/marss86-devel
