In order to receive interrupts for the keypad on Langwell, firmware is supposed to program the GPIO pins 24-43 to alternate function 1. This should be fixed in firmware, but this workaround sets those bits.
Signed-off-by: Kristen Carlson Accardi <[email protected]> --- arch/x86/platform/mrst/mrst.c | 23 +++++++++++++++++++++++ 1 files changed, 23 insertions(+), 0 deletions(-) diff --git a/arch/x86/platform/mrst/mrst.c b/arch/x86/platform/mrst/mrst.c index 88c0f78..a9d8192 100644 --- a/arch/x86/platform/mrst/mrst.c +++ b/arch/x86/platform/mrst/mrst.c @@ -43,6 +43,8 @@ #include <asm/apb_timer.h> #include <asm/reboot.h> +#define LANGWELL_GPIO_ALT_ADDR 0xff12c038 + /* * the clockevent devices on Moorestown/Medfield can be APBT or LAPIC clock, * cmdline option x86_mrst_timer can be used to override the configuration @@ -995,10 +997,31 @@ static int __init sfi_parse_devs(struct sfi_table_header *table) return 0; } +/* setting multi-function-pin */ +static void set_alt_func(void) +{ + u32 __iomem *mem = ioremap_nocache(LANGWELL_GPIO_ALT_ADDR, 16); + u32 value; + + if (!mem) { + pr_err("can not map GPIO controller address.\n"); + return; + } + + /* set alt function on gpio pins 24-43 so keypad will work */ + value = (readl(mem + 1) & 0x0000ffff) | 0x55550000; + writel(value, mem + 1); + value = (readl(mem + 2) & 0xf0000000) | 0x00555555; + writel(value, mem + 2); + + iounmap(mem); +} + static int __init mrst_platform_init(void) { sfi_table_parse(SFI_SIG_GPIO, NULL, NULL, sfi_parse_gpio); sfi_table_parse(SFI_SIG_DEVS, NULL, NULL, sfi_parse_devs); + set_alt_func(); return 0; } arch_initcall(mrst_platform_init); -- 1.7.2.3 _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
