On Mon, May 23, 2011 at 03:45:03PM +0800, Lu Guanqun wrote: > very low. Hi Arjan,
oops, the stgit client chops the long subject line... please ignore this mail, and use this next patch I sent. Sorry for the trouble. > > Accoring to the investigation in Wistron, it's due to the unstablized signals > before they can be used safely. > > Therefore, time delay is added to ensure the signal VAUDIO, AUVR and PLL is > stablized correctly. > > Accoring to the spec, AUVR needs at least 2ms to stablize, while PLL1/PLL2 > needs at least 5ms to stablize. Besides, 250us is added after setting > VAUDIO1/VAUDIO2. The delay is added at three places: a) initialization time. > b) the time to playback. c) the time to capture. > > Signed-off-by: Lu Guanqun <[email protected]> > --- > drivers/staging/intel_sst/intelmid_v2_control.c | 59 > +++++++++++++++-------- > 1 files changed, 39 insertions(+), 20 deletions(-) > > diff --git a/drivers/staging/intel_sst/intelmid_v2_control.c > b/drivers/staging/intel_sst/intelmid_v2_control.c > index 2010ba6..0c5d69c 100644 > --- a/drivers/staging/intel_sst/intelmid_v2_control.c > +++ b/drivers/staging/intel_sst/intelmid_v2_control.c > @@ -100,6 +100,9 @@ static int nc_init_card(void) > { > struct sc_reg_access sc_access[] = { > {VAUDIOCNT, 0x25, 0}, > + > + {VREFPLL, 0x10, 0}, > + > {VOICEPORT1, 0x00, 0}, > {VOICEPORT2, 0x00, 0}, > {AUDIOPORT1, 0x98, 0}, > @@ -111,7 +114,6 @@ static int nc_init_card(void) > {POWERCTRL1, 0x00, 0}, > {POWERCTRL2, 0x00, 0}, > {DRVPOWERCTRL, 0x00, 0}, > - {VREFPLL, 0x10, 0}, > {HPLMIXSEL, 0xee, 0}, > {HPRMIXSEL, 0xf6, 0}, > {PCMBUFCTRL, 0x0, 0}, > @@ -127,10 +129,23 @@ static int nc_init_card(void) > {DMICCTRL1, 0x40, 0}, > {AUXDBNC, 0xff, 0}, > }; > + struct sc_reg_access *sc; > + > snd_pmic_ops_nc.card_status = SND_CARD_INIT_DONE; > snd_pmic_ops_nc.master_mute = UNMUTE; > snd_pmic_ops_nc.mute_status = UNMUTE; > - sst_sc_reg_access(sc_access, PMIC_WRITE, 27); > + > + sc = sc_access; > + sst_sc_reg_access(sc, PMIC_WRITE, 1); > + usleep_range(250, 1000); > + > + sc++; > + sst_sc_reg_access(sc, PMIC_WRITE, 1); > + usleep_range(2000, 2500); > + > + sc++; > + sst_sc_reg_access(sc, PMIC_WRITE, 25); > + > pr_debug("sst: init complete!!\n"); > return 0; > } > @@ -168,7 +183,7 @@ static int nc_enable_audiodac(int value) > > static int nc_power_up_pb(unsigned int port) > { > - struct sc_reg_access sc_access[7]; > + struct sc_reg_access sc_access[3]; > int retval = 0; > > if (snd_pmic_ops_nc.card_status == SND_CARD_UN_INIT) > @@ -185,17 +200,19 @@ static int nc_power_up_pb(unsigned int port) > sc_access[0].reg_addr = VAUDIOCNT; > sc_access[0].value = 0x27; > sc_access[0].mask = 0x27; > - sc_access[1].reg_addr = VREFPLL; > + sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1); > + usleep_range(250, 1000); > + > + sc_access[0].reg_addr = VREFPLL; > if (port == 0) { > - sc_access[1].value = 0x3A; > - sc_access[1].mask = 0x3A; > + sc_access[0].value = 0x2A; > + sc_access[0].mask = 0x2A; > } else if (port == 1) { > - sc_access[1].value = 0x35; > - sc_access[1].mask = 0x35; > + sc_access[0].value = 0x25; > + sc_access[0].mask = 0x25; > } > - retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2); > - > - > + sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1); > + usleep_range(5000, 5500); > > sc_access[0].reg_addr = POWERCTRL1; > if (port == 0) { > @@ -235,7 +252,7 @@ static int nc_power_up_pb(unsigned int port) > > static int nc_power_up_cp(unsigned int port) > { > - struct sc_reg_access sc_access[5]; > + struct sc_reg_access sc_access[2]; > int retval = 0; > > > @@ -252,17 +269,19 @@ static int nc_power_up_cp(unsigned int port) > sc_access[0].reg_addr = VAUDIOCNT; > sc_access[0].value = 0x27; > sc_access[0].mask = 0x27; > - sc_access[1].reg_addr = VREFPLL; > + sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1); > + usleep_range(250, 1000); > + > + sc_access[0].reg_addr = VREFPLL; > if (port == 0) { > - sc_access[1].value = 0x3E; > - sc_access[1].mask = 0x3E; > + sc_access[0].value = 0x2E; > + sc_access[0].mask = 0x2E; > } else if (port == 1) { > - sc_access[1].value = 0x35; > - sc_access[1].mask = 0x35; > + sc_access[0].value = 0x25; > + sc_access[0].mask = 0x25; > } > - > - retval = sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 2); > - > + sst_sc_reg_access(sc_access, PMIC_READ_MODIFY, 1); > + usleep_range(5000, 5500); > > sc_access[0].reg_addr = POWERCTRL1; > if (port == 0) { > > _______________________________________________ > MeeGo-kernel mailing list > [email protected] > http://lists.meego.com/listinfo/meego-kernel -- guanqun _______________________________________________ MeeGo-kernel mailing list [email protected] http://lists.meego.com/listinfo/meego-kernel
