> And dont the K6-III and Athlon support an L3 design, using slower memory
> of
> course, but dedicated to each CPU so eliminating bus contention? Of
> course,
> the K6-III doesn't do SMP, but the Athlon supports it, doesn't it? Are
> there any SMP motherboards out there yet for the Athlon?
>
The K6's and the Cyrix 6x86's could do SMP just like the pentium. The only
problem was that they used the OpenPIC standard and noone ever built a
chipset that implemented that, so no SMP systems.
The Athlon not only supports SMP, but it does it the, IMHO, Right Way(tm).
They use a point to point bus between the processor and the core logic.
Hence, a SMP Athlon system has no shared bus. Each processor gets a pipe to
the core logic and it has however many pipes to memory/IO that it wants.
This is what you have to do to scale SMP very high, anyway. I think the
Intel chips force this for #CPUs>4, too. Maybe it's 2--I can't remember
right now.
Cheers,
David
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