On Wednesday 27 February 2002 19:28, Justin Valcourt wrote: > Which brings up something that I just wondered about. > > As far as FFT operations go for LL and DC, if some crazy person who had > millions to spend (ie we are talking pure theory here) to hire a chip > maker, could a "coprocessor" be made that specializes in FFT operations? Or > do the optimazations in the code that use SSE2 on P4s pretty much equate to > the same thing? > > Or maybe someone has already made such a chip?
SSE2 is essentially a limited form of vector processing. Vector systems that can process a very large number of operands in parallel already exist (in very expensive supercomputers). Alternate hardware approaches to the problem of computing x^2-2 (mod 2^p-1) involving very long word length are possible. With a long enough word it's possible in principle to compute x^2-2 (mod 2^p-1) in a _very_ few clocks (possibly as few as two), without even having to resort to FFT. The problem is that practical hardware would have to contain an enormous number of gates - of the order of hundreds of thousands or even millions of times more gates than there are in a Pentium 4 - and this specialised hardware would have somewhat limited applications, thus making it commercially unviable to develop or produce. Unless No Such Agency (or someone else with equally deep pockets) would like to buy a few million of them to help them crack commercial cyphers? Part of the fun of this project is doing something which is so "leading edge" with relatively cheap, mass-produced consumer hardware! Regards Brian Beesley _________________________________________________________________________ Unsubscribe & list info -- http://www.ndatech.com/mersenne/signup.htm Mersenne Prime FAQ -- http://www.tasam.com/~lrwiman/FAQ-mers
