The branch, mesa_7_0_branch has been updated
Commits at: http://cgit.freedesktop.org/mesa/mesa/log/?h=mesa_7_0_branch
Summary of changes:
src/mesa/drivers/dri/i915/i915_fragprog.c | 255 +++++++++++++---------
src/mesa/drivers/dri/i915/intel_tris.c | 30 ++-
src/mesa/drivers/dri/i965/brw_cc.c | 7 +-
src/mesa/drivers/dri/i965/brw_eu.h | 4 +-
src/mesa/drivers/dri/i965/brw_program.c | 3 +
src/mesa/drivers/dri/i965/brw_sf_state.c | 8 +-
src/mesa/drivers/dri/i965/brw_vs_emit.c | 7 +-
src/mesa/drivers/dri/i965/brw_vs_tnl.c | 7 +-
src/mesa/drivers/dri/i965/brw_wm.c | 29 +++-
src/mesa/drivers/dri/i965/brw_wm.h | 2 +
src/mesa/drivers/dri/i965/brw_wm_emit.c | 49 +++-
src/mesa/drivers/dri/i965/brw_wm_fp.c | 39 ++--
src/mesa/drivers/dri/i965/brw_wm_glsl.c | 18 +-
src/mesa/drivers/dri/i965/brw_wm_pass1.c | 2 +-
src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 3 -
src/mesa/drivers/dri/i965/intel_blit.c | 2 +-
src/mesa/drivers/dri/i965/intel_context.c | 15 +-
src/mesa/drivers/dri/i965/intel_context.h | 4 -
src/mesa/main/dlist.c | 33 +++
src/mesa/main/imports.c | 19 ++
20 files changed, 359 insertions(+), 177 deletions(-)
via 6f4c8b5b5047c6ff6273e3acc98c7ec504bb0e21 (commit)
via f8bd9cc30fed39bd6c935b410b745acb73b18bbc (commit)
via d9f9b1cd0b4bb88b62f68fd67775a1c558d7d25d (commit)
via eca283976b1271c6b7e270f968e820e9cc5a54b5 (commit)
via 2176259ca6c1c5060f5dc9729ca60eb796d5d777 (commit)
via 8fe6fcb900913770ab47e502ee2525554358806f (commit)
via 76d6edcc385d7ae188255c95251f3ecd1e29150c (commit)
via 98d6c671f597256645697cb8806a057c3038819b (commit)
via f652811df4424d29427d5cbaf41432843238ec4d (commit)
via e279f4601d2ad1b15f2b6b71e9c6804a7a7f0b23 (commit)
via 87a30337a1a0c3f409163cb0f249d3f684de0ecf (commit)
via 9c2047b2759c7fa0373d976b4e9916738fc26692 (commit)
via 1dcb0433a309c934f5d132a322993b5d861b1980 (commit)
via 5ff27e02b35a8a699f1b4fb805a04a3d765c6f59 (commit)
via 4beee58e57eaa09a17a7b74e268b2818d37644b2 (commit)
via 1f9de207195e8f7f65c07763e4693d9e06481892 (commit)
via d05a8d97507367bcc0a0b1b76a629685257e5c1e (commit)
via db5f206c002c2306ca0f138198fca22e454ea4f9 (commit)
via 9dface8347773bc7de27c93cddda05b32d2c6b81 (commit)
via 32f4940883ea4117fe12ee398a40e05196fa8519 (commit)
via a7969a9b93605946214d65da7e3290e288aa76b8 (commit)
via ad88130df54dddf8454abfca57de012240602eda (commit)
via d1e71bc08ba5c401be0674d96d791beb0edc1755 (commit)
from fa58fe247cbeb99b7072a6aac99ea4bd18a54903 (commit)
- Commits -----------------------------------------------
commit 6f4c8b5b5047c6ff6273e3acc98c7ec504bb0e21
Author: Xiang, Haihao <[EMAIL PROTECTED]>
Date: Tue Jun 10 16:31:36 2008 +0800
i965: apply commit 6c1a98e97affb2163e776551eb3a9e669ff99bbf to glsl
(cherry picked from commit a742bed99ae840d806198172005f6b25399ec573)
commit f8bd9cc30fed39bd6c935b410b745acb73b18bbc
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Tue May 6 13:01:29 2008 -0700
Add support for ATI_separate_stencil in display lists.
(cherry picked from commit 7f747204ea3b61e507b8bd48f33e8dd83f34705b)
commit d9f9b1cd0b4bb88b62f68fd67775a1c558d7d25d
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Wed Mar 26 12:51:20 2008 -0700
[965] Correctly set read mask for OPCODE_SWZ in pass1.
While OPCODE_SWZ has usually been optimized away in pass0, it may still
exist if a SWZ with dst saturate was emitted in pass_fp. Fixes an error
in oglconform fpalu.c.
(cherry picked from commit 13a6f73a64e23bad71d5e94d446e133b3cf634f7)
commit eca283976b1271c6b7e270f968e820e9cc5a54b5
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Fri Mar 21 14:18:26 2008 -0700
[965] Avoid emitting dead code for DPx/math instructions.
The pass1 optimization stage clears out writemasks and registers, but the
instructions themselves are still being processed at this stage, and could
have resulted in them still being emitted.
(cherry picked from commit c60b5dfde869c208a479ac273f4538d4d07574cf)
commit 2176259ca6c1c5060f5dc9729ca60eb796d5d777
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Fri Mar 21 13:48:12 2008 -0700
[965] Improve pinterp performance by delaying reads of just-written regs.
(cherry picked from commit bb419970ef465804c0e5369264314d9d92726c18)
commit 8fe6fcb900913770ab47e502ee2525554358806f
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Fri Mar 21 13:43:44 2008 -0700
[965] Fix negating of unsigned value in emit_wpos_xy.
(cherry picked from commit 6c1a98e97affb2163e776551eb3a9e669ff99bbf)
commit 76d6edcc385d7ae188255c95251f3ecd1e29150c
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Fri Mar 21 13:41:12 2008 -0700
[965] Add MVP code for position invariant vertex programs.
This fixes the arbvptorus demo.
(cherry picked from commit 5f10438f2d9c739964cf53f04fee3190991325a1)
commit 98d6c671f597256645697cb8806a057c3038819b
Author: Michal Wajdeczko <[EMAIL PROTECTED]>
Date: Fri Mar 21 13:11:07 2008 -0700
[win32] Use native aligned memory allocation functions.
(cherry picked from commit 31fe7cf5e3ca38441acb25215420afa6944226f3)
commit f652811df4424d29427d5cbaf41432843238ec4d
Author: Andrzej Trznadel <[EMAIL PROTECTED]>
Date: Mon Mar 17 15:54:24 2008 -0700
[965] Fix fp temp reg release code to not usually release all temps.
Also, use wrapped ffs() instead of native.
(cherry picked from commit 3105bc1d885ea8ce083d2be85cbeac46d4d873a1)
commit e279f4601d2ad1b15f2b6b71e9c6804a7a7f0b23
Author: Andrzej Trznadel <[EMAIL PROTECTED]>
Date: Mon Mar 17 15:52:08 2008 -0700
Fix compat implementation of ffs() to return 1-based bit numbers.
(cherry picked from commit e9809a36aaea3480cba5bd62360bf9d481ff9011)
commit 87a30337a1a0c3f409163cb0f249d3f684de0ecf
Author: Keith Packard <[EMAIL PROTECTED]>
Date: Fri Apr 25 16:07:12 2008 -0700
[i965] short immediate values must be replicated to both halves of the dword
The 32-bit immediate value in the i965 instruction word must contain two
copies of any 16-bit constants. brw_imm_uw and brw_imm_w just needed to
copy the value into both halves of the immediate value instruction field.
(cherry picked from commit ca73488f48e3ee278f0185bb7dcc03d7bdedb62d)
commit 9c2047b2759c7fa0373d976b4e9916738fc26692
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Wed Mar 26 13:23:43 2008 -0700
[965] Don't let the negate flags of src0 affect 1 constants in
precalc_dst/lit
This patch is a variant of a submission by Michal Wajdeczko to fix
oglconform fpalu failures.
(cherry picked from commit b4cbf6983e0e6d6502c1260f60c463841ab74590)
commit 1dcb0433a309c934f5d132a322993b5d861b1980
Author: Zou Nan hai <[EMAIL PROTECTED]>
Date: Wed Mar 19 16:29:47 2008 +0800
[i915] fix fragment.position
commit 5ff27e02b35a8a699f1b4fb805a04a3d765c6f59
Author: Zou Nan hai <[EMAIL PROTECTED]>
Date: Mon Mar 17 16:39:10 2008 +0800
[i965] fix wpos height 1 pixel higher
(cherry picked from commit b0f681b458ebebab370bbfd2a17699cd851aae8b)
commit 4beee58e57eaa09a17a7b74e268b2818d37644b2
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Thu Feb 28 13:18:12 2008 -0800
[965] Bug #9151: make fragment.position return window coords not screen
coords.
(cherry picked from commit 9c8f27ba1366da07e20e86a0d48341ea97f5cda4)
commit 1f9de207195e8f7f65c07763e4693d9e06481892
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Wed Feb 6 15:41:04 2008 -0800
[915] Fix COS function using same plan as SIN.
The previous COS function failed badly outside of [-pi/2, pi/2].
commit d05a8d97507367bcc0a0b1b76a629685257e5c1e
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Wed Feb 6 15:38:16 2008 -0800
[915] Use a quartic term to improve the accuracy of SIN results.
This is described in the link in the comment, and is the same technique that
r300 uses.
commit db5f206c002c2306ca0f138198fca22e454ea4f9
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Wed Feb 6 11:34:14 2008 -0800
[915] Fix fp SIN function, and use a quadratic approximation instead of
Taylor.
The Taylor series notably fails at producing sin(pi) == 0, which leads to
discontinuity every 2*pi. The quadratic gets us sin(pi) == 0 behavior, at
the
expense of going from 2.4% THD with working Taylor series to 3.8% THD
(easily
seen on comparative graphs of the two). However, our previous
implementation
was producing sin(pi) < -1 and worse, so any reasonable approximation is an
improvement. This also fixes the repeating behavior, where the previous
implementation would repeat sin(x) for x>pi as sin(x % pi) and the opposite
for x < -pi.
commit 9dface8347773bc7de27c93cddda05b32d2c6b81
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Thu Jan 17 11:25:04 2008 -0800
[965] Fix potential segfaults from bad realloc.
C has no order of evaluation restrictions on function arguments, so we
attempted to realloc from new-size to new-size.
(cherry picked from commit e747e9a072c826f803407c03932adcee7f16cb83)
commit 32f4940883ea4117fe12ee398a40e05196fa8519
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Wed Jan 16 15:07:10 2008 -0800
[965] Fix inversion of SLT/SGE results in vertex programs.
The WM code had this right, so copy its behavior. This reverts a flipping
of the arguments to SLT in brw_vs_tnl which came in with the GLSL code that
probably occurred to work around the flipped results, and brings the code
back
in line with t_vp_build.c.
(cherry picked from commit 9bae03a583fc6d2d0b916961279abe9156078d1e)
commit a7969a9b93605946214d65da7e3290e288aa76b8
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Fri Dec 21 11:39:33 2007 -0800
[965] Fix and enable separate stencil.
Note that this does not enable GL_EXT_stencil_two_side, because Mesa's
computed
_TestTwoSide ends up respecting only STENCIL_TEST_TWO_SIDE_EXT (defaults to
GL_FALSE), even if the application uses only GL 2.0 / ATI entrypoints.
(cherry picked from commit 9136e1f2c80ce891fb6270341a4316f219c89d49)
commit ad88130df54dddf8454abfca57de012240602eda
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Mon Dec 17 14:28:54 2007 -0800
[965] Replace our own depth constants in intel context with GL context ones.
commit d1e71bc08ba5c401be0674d96d791beb0edc1755
Author: Eric Anholt <[EMAIL PROTECTED]>
Date: Fri Dec 7 15:20:00 2007 -0800
[965] Remove dead code in upload_wm_surfaces.
(cherry picked from commit 3ecdae82d751f9f404d10332f030e3280949ce4e)
---------------------------------
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