Mesa (radeon-rewrite): r300: rework texture offset emission.

[Jerome Glisse]

Module: Mesa
Branch: radeon-rewrite
Commit: 2f9189d538ac56bd241ccc8f8f82bc4fdd779aa6
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2f9189d538ac56bd241ccc8f8f82bc4fdd779aa6

Author: Jerome Glisse <jgli...@redhat.com>
Date:   Thu May 28 11:40:58 2009 +0200

r300: rework texture offset emission.

---

 src/mesa/drivers/dri/r300/r300_cmdbuf.c |   20 +++++++++++++-------
 1 files changed, 13 insertions(+), 7 deletions(-)

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c 
b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 60ad8ea..e605076 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -179,27 +179,33 @@ static void emit_tex_offsets(GLcontext *ctx, struct 
radeon_state_atom * atom)
                if (r300->radeon.radeonScreen->kernel_mm && notexture) {
                        return;
                }
-               BEGIN_BATCH_NO_AUTOSTATE(4 * numtmus);
                for(i = 0; i < numtmus; ++i) {
                    radeonTexObj *t = r300->hw.textures[i];
-                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                    if (t && !t->image_override) {
+                BEGIN_BATCH_NO_AUTOSTATE(4);
+                OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                            OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
                                            
RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
+                END_BATCH();
                    } else if (!t) {
-                           OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]);
+                /* Texture unit hasn't a texture bound nothings to do */
                    } else { /* override cases */
                            if (t->bo) {
+                    BEGIN_BATCH_NO_AUTOSTATE(4);
+                    OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH_RELOC(t->tile_bits, t->bo, 0,
                                                    
RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0);
+                    END_BATCH();
                            } else if (!r300->radeon.radeonScreen->kernel_mm) {
+                    BEGIN_BATCH_NO_AUTOSTATE(2);
+                    OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH(t->override_offset);
-                           }
-                           else
-                               
OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]);
+                    END_BATCH();
+                           } else {
+                    /* Texture unit hasn't a texture bound nothings to do */
+                }
                    }
                }
-               END_BATCH();
        }
 }
 

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