Module: Mesa Branch: master Commit: 259cae4442ba3ad1d1b8e981e47f42493d93ca86 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=259cae4442ba3ad1d1b8e981e47f42493d93ca86
Author: Kenneth Graunke <[email protected]> Date: Wed Apr 22 08:42:17 2020 -0700 intel/compiler: Don't create 64-bit src1 immediates in opt_peephole_sel 64-bit immediates are only allowed as src0. Long ago, we decided to avoid constructing such illegal situations in the IR, rather than allowing them in the IR but then promoting bogus immediates to GRFs later. So, we need to fix opt_peephole_sel to not put 64-bit immediates as src1 of the new SEL instruction. Fixes: a4b36cd3dd3 ("intel/fs: Coalesce when the src live range is contained in the dst") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2816 Reviewed-by: Matt Turner <[email protected]> Reviewed-by: Ian Romanick <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4692> --- src/intel/compiler/brw_fs_sel_peephole.cpp | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/src/intel/compiler/brw_fs_sel_peephole.cpp b/src/intel/compiler/brw_fs_sel_peephole.cpp index b36a048601f..6de5211f56d 100644 --- a/src/intel/compiler/brw_fs_sel_peephole.cpp +++ b/src/intel/compiler/brw_fs_sel_peephole.cpp @@ -202,9 +202,15 @@ fs_visitor::opt_peephole_sel() ibld.MOV(src0, then_mov[i]->src[0]); } + /* 64-bit immediates can't be placed in src1. */ + fs_reg src1(else_mov[i]->src[0]); + if (src1.file == IMM && type_sz(src1.type) == 8) { + src1 = ibld.vgrf(else_mov[i]->src[0].type); + ibld.MOV(src1, else_mov[i]->src[0]); + } + set_predicate_inv(if_inst->predicate, if_inst->predicate_inverse, - ibld.SEL(then_mov[i]->dst, src0, - else_mov[i]->src[0])); + ibld.SEL(then_mov[i]->dst, src0, src1)); } then_mov[i]->remove(then_block); _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
