URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5eb82e14685ab68b5c9134d9de66d3b691f44d32
Author: Dylan Baker <[email protected]>
Date:   Wed Oct 14 09:47:44 2020 -0700

    VERSION: bump for 20.2.1

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0dcebc459f38a08e5acf7b973393ef3bcf1abf62
Author: Dylan Baker <[email protected]>
Date:   Wed Oct 14 09:46:48 2020 -0700

    docs: add release notes for 20.2.1

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=8c2ad9f9cba6c57c26cf34f1d9333fed8b0884f6
Author: Rhys Perry <[email protected]>
Date:   Wed Oct 7 20:07:42 2020 +0100

    spirv: replace discard with demote for incorrect HLSL->SPIR-V translations
    
    Fixes artifacts on decals in Path of Exile.
    
    Signed-off-by: Rhys Perry <[email protected]>
    Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3610
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
    (cherry picked from commit 037d9fb278c44bf5bd8fea6c6c78af321555d141)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=732b28c8b1cd3e7815bacf8e3fe31461e514c397
Author: Jose Maria Casanova Crespo <[email protected]>
Date:   Fri Oct 9 18:40:45 2020 +0200

    vc4: Enable lower_umax and lower_umin
    
    VC4 doesn't have support for UMAX and UMIN integer operations. So
    we should avoid algebraic optimizations that generate umax/umin ops.
    
    Fixes: 8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero")
    Reviewed-by: Alejandro Piñeiro <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
    (cherry picked from commit d5e5f72e06165928ee5d9f13d0de7d73038daa0e)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a66268d3f4f700b37bd09a87a1fe73f3dba33ac7
Author: Jose Maria Casanova Crespo <[email protected]>
Date:   Fri Oct 9 18:33:26 2020 +0200

    nir/algebraic: optimize iand/ior of (n)eq zero when umax/umin not available
    
    Before 8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero") 
this
    optimization didn't need the use of umax/umin. VC4 HW supports only signed
    integer max/min operations.
    
    lower_umin and lower_umax are added to allow enabling previous optimizations
    behaviour for this cases.
    
    Fixes: 8e1b75b330954a ("nir/algebraic: optimize iand/ior of (n)eq zero")
    Reviewed-by: Alejandro Piñeiro <[email protected]>
    Reviewed-by: Daniel Schürmann <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7083>
    (cherry picked from commit e7127b3468cbaa888bfd21ebeb2f34ab8dd8b78d)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f8953b4d810d2ba29cebf74ad5d94e82a1c307ff
Author: Marek Olšák <[email protected]>
Date:   Tue Oct 6 07:06:30 2020 -0400

    ac/surface: fix valgrind warnings in DCC retile tile lookups
    
    ==12920== Conditional jump or move depends on uninitialised value(s)
    ==12920==    at 0x8F39391: util_fast_urem32 (fast_urem_by_const.h:71)
    ==12920==    by 0x8F39391: hash_table_search (hash_table.c:285)
    ==12920==    by 0x8B06D5D: ac_compute_dcc_retile_tile_indices 
(ac_surface.c:136)
    
    Fixes: a37aeb128d5f7c "amd/common: Cache intra-tile addresses for retile 
map."
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
    Reviewed-by: Bas Nieuwenhuizen <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7055>
    (cherry picked from commit a4e4644eff4160450b2a6648f3c160aa06256158)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a83bb83a258c1c9b425ac5bfa4b683d5f75c7fd8
Author: Bas Nieuwenhuizen <[email protected]>
Date:   Fri Oct 9 03:12:55 2020 +0200

    radv: Fix mipmap extent adjustment on GFX9+.
    
    With arrays we really have to use the correct size for the base
    mipmap to get the right array pitch. In particular, using
    surf_pitch results in pitch that is bigger than the base mipmap
    and hence results in wrong pitches computed by the HW.
    
    It seems that on GFX9 this has mostly been hidden by the epitch
    provided in the descriptor but this is not something we do on
    GFX10 anymore.
    
    Now this has some draw-backs:
    
    1. normalized coordinates don't work
    2. Bounds checking uses slightly bigger bounds.
    
    2 mostly is not an issue as we still ensure that they're within
    the texture memory and not overlapping other layers/mips, but
    we can't properly ignore writes.
    
    1 is kinda dead in the water ... On the other hand I'd argue that
    using normalized coords & a filter for sampling a block view of
    a compressed format is extraordinarily useless.
    
    The old method we employed already had these drawbacks for everything
    except the base miplevel of the imageview.
    
    AFAICT this is the same tradeoff AMDVLK makes and no CTS test hits
    this. (once it does I think the HW is dead in the water ... Only
    workaround I can think of is shader processing which is hard because
    we don't know texture formats at compile time.)
    
    I also removed the extra calculations when the image has only 1 mip
    level because they ended up being a no-op in that case.
    
    CC: mesa-stable
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2292
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2266
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2483
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2906
    Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3607
    Reviewed-by: Samuel Pitoiset <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7090>
    (cherry picked from commit 1fb3e1fb70844d1bd84bc61de6022b85e4d45374)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d894f844a9b75d48b00eb94fa364bbf8f9d78522
Author: Dylan Baker <[email protected]>
Date:   Tue Oct 13 14:53:52 2020 -0700

    retab ac_surface.h so that backports apply

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=50d73a42baa1eb5cba998994713cf9de144b0add
Author: Rhys Perry <[email protected]>
Date:   Mon Oct 12 14:39:27 2020 +0100

    scons: fix SPIR-V -> NIR build
    
    Signed-off-by: Rhys Perry <[email protected]>
    Tested-by: Vinson Lee <[email protected]>
    Reviewed-by: Roland Scheidegger <[email protected]>
    Fixes: 18f9fc919e1 ('spirv: add and use a generator id enum')
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7096>
    (cherry picked from commit 044d213086be1a7d2f9b9dc16766d37852bd95b2)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0e076355cc7f5953bc0e75120af6be12890b2380
Author: Samuel Pitoiset <[email protected]>
Date:   Wed Sep 30 15:41:00 2020 +0200

    aco: implement missing nir_op_unpack_half_2x16_split_{x,y}_flush_to_zero
    
    SPIRV->NIR emits nir_op_unpack_half_2x16_flush_to_zero instead of
    nir_op_unpack_half_2x16 if the shader enables denorm flush to zero
    for 16-bit floating point.
    
    This doesn't fix anything known and CTS doesn't have tests.
    
    Fixes: 56d9bcdded8 ("radv: enable more float_controls features")
    Signed-off-by: Samuel Pitoiset <[email protected]>
    Reviewed-by: Daniel Schürmann <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6939>
    (cherry picked from commit b9ca4923d6c33af76dd25548bc8ec975d0bfe96c)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d77dd2db8b40fd4d60b068027cc403711abd7be0
Author: Rhys Perry <[email protected]>
Date:   Mon Oct 12 14:44:36 2020 +0100

    android: fix SPIR-V -> NIR build
    
    Signed-off-by: Rhys Perry <[email protected]>
    Reviewed-by: Mauro Rossi <[email protected]>
    Fixes: 18f9fc919e1 ('spirv: add and use a generator id enum')
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7097>
    (cherry picked from commit 1070bba19e26640bc1dbfd04180e97217761404d)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=45e82b5fa170e7bda62ceb37377417582ae0a0e2
Author: Eric Engestrom <[email protected]>
Date:   Wed Oct 7 20:52:42 2020 +0200

    radv: add missing u_atomic.h include
    
    Fixes: 7568c97df14f8702efcc ("radv: Use atomics to read query results.")
    Signed-off-by: Eric Engestrom <[email protected]>
    Reviewed-by: Bas Nieuwenhuizen <[email protected]>
    Reviewed-by: Samuel Pitoiset <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7050>
    (cherry picked from commit c02e933de4a9a644410384f815c84d1c08107b82)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d1083d469ef66e009d5d537c197e42bae69acbcf
Author: Dylan Baker <[email protected]>
Date:   Tue Oct 13 14:51:27 2020 -0700

    .pick_status.json: Update to e1efc534e6c452e3e606d663864896a654acc185

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=dd70375ee28ec838bd57b4a5b60de4092c1fe9c3
Author: Danylo Piliaiev <[email protected]>
Date:   Thu Jul 23 15:15:34 2020 +0300

    intel/fs: Disable sample mask predication for scratch stores
    
    Scratch stores are being lowered to the instructions with side-effects,
    however they should be enabled in fs helper invocations, since they
    are produced from operations which don't imply side-effects.
    
    To fix this - we move the decision of whether the sample mask predication
    is enable to the point where logical brw instructions are created.
    
    GLSL example of the issue:
    
     int tmp[1024];
     ...
     do {
       // changes to tmp
     } while (some_condition(tmp))
    
    If `tmp` is lowered to scrach memory, `some_condition` would be
    undefined if scratch write is predicated on sample mask, making
    possible for the while loop to become infinite and hang the GPU.
    
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3256
    Fixes: 53bfcdeecf4c9632e09ee641d2ca02dd9ec25e34
    Signed-off-by: Danylo Piliaiev <[email protected]>
    Reviewed-by: Matt Turner <[email protected]>
    Acked-by: Jason Ekstrand <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6056>
    (cherry picked from commit 77486db867bd39aa9b76e549c946b0a165fcb21a)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=365419d18aeec7079f15b6c60c9ff09ca43f1db9
Author: Rhys Perry <[email protected]>
Date:   Thu Oct 8 15:30:44 2020 +0100

    spirv: add and use a generator id enum
    
    Signed-off-by: Rhys Perry <[email protected]>
    Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
    Cc: mesa-stable
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7062>
    (cherry picked from commit 18f9fc919e1b5e7511cc3085dd990b7ca037f38e)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=5e0f0cce7eba5ed0d2551717aa5b0b0131a2eea5
Author: Alyssa Rosenzweig <[email protected]>
Date:   Tue Oct 6 10:24:56 2020 -0400

    pan/bi: Fix simple txl test
    
    Signed-off-by: Alyssa Rosenzweig <[email protected]>
    Fixes: 731dfc6066d ("pan/bi: Allow vertex txl with lod=0 as compact")
    Reviewed-by: Boris Brezillon <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
    (cherry picked from commit 93f9052935fc451f5f56c6e9b02a6516031533a2)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d611e2fd71db58d0b86a56f7f07fec87683043a9
Author: Alyssa Rosenzweig <[email protected]>
Date:   Fri Oct 2 15:49:55 2020 -0400

    pan/bi: Handle vector moves
    
    And fix the bad assertion that let this slip.
    
    Like combines, nir_op_vec can be vector, and we need to lower this
    ourselves. Thankfully, the lowering is simple.
    
    Fixes
    
dEQP-GLES2.functional.shaders.loops.for_uniform_iterations.nested_tricky_dataflow_1_*
    
    Fixes: b2c6cf2b6db ("pan/bi: Eliminate writemasks in the IR")
    Signed-off-by: Alyssa Rosenzweig <[email protected]>
    Reviewed-by: Boris Brezillon <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7081>
    (cherry picked from commit a204eac75991691d9d55455db2b718fbfa03d81e)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=21f7264ff4836f6f4c65a6e1efd2625dd1e2ba27
Author: Nanley Chery <[email protected]>
Date:   Wed Oct 7 08:36:28 2020 -0700

    anv: Enable multi-layer aux-map init for HIZ+CCS
    
    Fixes rendering corruption in the shadowmappingcascade Sascha Willems
    Vulkan demo. To see the corruption, I adjusted the demo options as
    follows:
    
     1. Enable "Display depth map"
     2. Set "Split lambda" to 0.100
     3. Make "Cascade" non-zero.
    
    Fixes: 80ffbe915fe ("anv: Add support for HiZ+CCS")
    Reviewed-by: Sagar Ghuge <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7046>
    (cherry picked from commit cce6fc3b5c791f656b043b1d67052b685fdc00be)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=374f82ba72c8663f5616237e7a5ef9004795b249
Author: Jason Ekstrand <[email protected]>
Date:   Thu Sep 24 16:28:56 2020 -0500

    intel/nir: Don't try to emit vector load_scratch instructions
    
    In 53bfcdeecf4c9, we added load/store_scratch instructions which deviate
    a little bit from most memory load/store instructions in that we can't
    use the normal untyped read/write instructions which can read and write
    up to a vec4 at a time.  Instead, we have to use the DWORD scattered
    read/write instructions which are scalar.  To handle this, we added code
    to brw_nir_lower_mem_access_bit_sizes to cause them to be scalarized.
    However, one case was missing: the load-as-larger-vector case.  In this
    case, we take small bit-sized constant-offset loads replace it with a
    32-bit load and shuffle the result around as needed.
    
    For scratch, this case is much trickier to get right because it often
    emits vec2 or wider which we would then have to lower again.  We did
    this for other load and store ops because, for lower bit-sizes we have
    to scalarize thanks to the byte scattered read/write instructions being
    scalar.  However, for scratch we're not losing as much because we can't
    vectorize 32-bit loads and stores either.  It's easier to just disallow
    it whenever we have to scalarize.
    
    Fixes: 53bfcdeecf4c9 "intel/fs: Implement the new load/store_scratch..."
    Reviewed-by: Kenneth Graunke <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6872>
    (cherry picked from commit fd04f858b0aa9f688f5dfb041ccb706da96f862a)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=c6cc724a708d575090d61cf159da5070f81ca7a6
Author: Dylan Baker <[email protected]>
Date:   Tue Oct 6 10:25:46 2020 -0700

    glsl/xxd.py: fix imports
    
    sys and string are unused, os is needed but not imported
    
    fixes: 412472da5cb30b603e218b34893936cc70039ded
           ("glsl: Add utility to convert text files to C strings")
    
    Reviewed-by: Jason Ekstrand <[email protected]>
    Reviewed-by: Jesse Natalie <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7034>
    (cherry picked from commit 3ff513ee5d995b733f0f91b0f6c645676038afbc)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ea455f0465e4c272ddc734a349aa87fc46d0f4c5
Author: Lucas Stach <[email protected]>
Date:   Fri Sep 11 18:47:04 2020 +0200

    etnaviv: stop leaking the dummy texure descriptor BO
    
    Free the dummy texture descriptor BO on context destroy.
    
    Fixes: eda73d71277a (etnaviv: GC7000: Texture descriptors)
    Signed-off-by: Lucas Stach <[email protected]>
    Reviewed-by: Guido Günther <[email protected]>
    Reviewed-by: Christian Gmeiner <[email protected]>
    Cc: <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6986>
    (cherry picked from commit 9d5ec7f6f2c480093b2880387acf4a892c1d28f3)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=eebdf4d28c2407668e42528943a61e624ba51add
Author: Pierre-Eric Pelloux-Prayer <[email protected]>
Date:   Tue Oct 6 14:29:15 2020 +0200

    omx/tizonia: fix build
    
    Fixes: 24f2b0a8560 ("gallium/video: remove pipe_video_buffer.chroma_format")
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3595
    Reviewed-by: Leo Liu <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7026>
    (cherry picked from commit 8b205402c34d9217ef2c73e96db92ba3e99d507e)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=72c3e51c39fa86867c93790988ba8474a049cd1e
Author: Marek Olšák <[email protected]>
Date:   Mon Oct 5 12:02:19 2020 -0400

    gallium/u_threaded_context: fix use-after-free in transfer_unmap
    
    discovered by valgrind
    
    Fixes: fd6a5e112aa
    
    Reviewed-by: Pierre-Eric Pelloux-Prayer <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6952>
    (cherry picked from commit 3dc00c33f08e0000fa2fead5ac96c8864be7d319)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=332c00a536059a783b33516ddb4da0f6402cf181
Author: Nanley Chery <[email protected]>
Date:   Tue Sep 29 05:49:54 2020 -0700

    iris: Fix a fast-clear skipping optimization
    
    When support for multi-slice fast-clears was introduced for color
    surfaces, an existing optimization for skipping fast-clears was not
    updated (this optimization assumed single-slice fast-clears). As a
    result, the driver began to skip multi-layer fast-clears if just the
    first slice was in the CLEAR state (ignoring the state of the others).
    
    A Civilization VI trace was the only workload I found to make use of
    this optimization and it did so for 2D, non-array textures. Therefore,
    this fix simply checks that the depth of the clear box is 1. It also
    moves the single-slice aux-state query closer to the optimization to
    clarify the need for the depth check.
    
    Enables iris to pass a case of the fcc-write-after-clear piglit test,
    [fast-clear tracking across layers 0 -> 1 -> (0,1)].
    
    Fixes: 393f659ed83 ("iris: Enable fast clears on other miplevels and layers 
than 0.")
    Reviewed-by: Lionel Landwerlin <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6973>
    (cherry picked from commit 3f3a5f3489f5df6061ea8e74e697287bbbb4e252)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e29629de7dbeac0c99b3d33a02a56e8a59c52bdd
Author: Lionel Landwerlin <[email protected]>
Date:   Tue Oct 6 11:38:54 2020 +0300

    intel/perf: fix crash when no perf queries are supported
    
    Signed-off-by: Lionel Landwerlin <[email protected]>
    Fixes: ec1fa1d51ff614 ("intel/perf: fix raw query kernel metric selection")
    Reviewed-by: Marcin Ślusarz <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7024>
    (cherry picked from commit 79f354441262622ea9b56d47dcbdc284f0eed6ad)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a19b215ad6f5c5c9cba885f76d35ed8f36289714
Author: Dylan Baker <[email protected]>
Date:   Mon Oct 12 10:02:31 2020 -0700

    .pick_status.json: Mark 4790811d78011d45830d9543ad6e7401391cfb15 as 
denominated

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=959a5d195ec9ea565f5475acc2de68281de990e2
Author: Dylan Baker <[email protected]>
Date:   Mon Oct 12 10:02:30 2020 -0700

    .pick_status.json: Mark b23013db0aa6845d661c2da5d4003615b064e01f as 
denominated

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=adedbb1a9c5360ae43e6cce1e9fa5d40851d5757
Author: Dylan Baker <[email protected]>
Date:   Mon Oct 12 10:02:26 2020 -0700

    .pick_status.json: Update to b32a8f83dce3b8789f2e8790ab41b8a63c9bedc6

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=2e620304230e7b41519f9e178c9ddc249dc8c187
Author: Jose Maria Casanova Crespo <[email protected]>
Date:   Fri Oct 2 00:55:07 2020 +0100

    vc4: Avoid negative scissor caused by no intersection
    
    This fixes 6 tests that were crashing on VC4 since
    EGL_KHR_swap_buffers_with_damage was enabled.
    
    dEQP-EGL.functional.swap_buffers_with_damage.*.buffer_age_render
    
    Cc: 20.2 <mesa-stable>
    Reviewed-by: Eric Anholt <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6976>
    (cherry picked from commit 961a8d71cdc2c0b13dccfd644cca84a2b97912e4)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=f3f44dbf637c3c3eb22fafc843f4065877c5fd10
Author: Vinson Lee <[email protected]>
Date:   Mon Sep 28 16:16:37 2020 -0700

    freedreno: Move rsc NULL check to before rsc dereferences.
    
    Fix defect reported by Coverity Scan.
    
    Dereference before null check (REVERSE_INULL)
    check_after_deref: Null-checking rsc suggests that it may be
    null, but it has already been dereferenced on all paths leading
    to the check.
    
    Fixes: 6173cc19c45d ("freedreno: gallium driver for adreno")
    Signed-off-by: Vinson Lee <[email protected]>
    Reviewed-by: Rob Clark <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6903>
    (cherry picked from commit 0a7bd14dbb8c1c44cfa31abd584f57379f609489)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ea01cd07aa5914ad3b332bfb1fea8f7648d1f0d
Author: Jason Ekstrand <[email protected]>
Date:   Fri Oct 2 13:37:05 2020 -0500

    intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEs
    
    When I copied and pasted the code from MOV_INDIRECT for handling the
    dependency controls, I missed a subtle difference between MOV_INDIRECT
    and SHUFFLE.  Specifically, MOV_INDIRECT gets lowered to a narrow
    instruction on Gen7 by the SIMD width lowering whereas SHUFFLE has to
    split it in the generator.  Therefore, the check safety check for
    whether or not we can use dependency control has to be based on the
    lowered width rather than the width of the original instruction.
    
    Fixes: a8ac61b0ee2fd "intel/fs: NoMask initialize the address..."
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3593
    Reviewed-by: Matt Turner <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6989>
    (cherry picked from commit 8427e5606721019b0885af5b986a875e7d562643)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b7c3713706694815321957d9ab1c986f0872dab8
Author: Bas Nieuwenhuizen <[email protected]>
Date:   Wed Sep 30 13:07:43 2020 +0200

    radv: Use atomics to read query results.
    
    The volatile pattern gives me flaky results for 32-bit builds on
    ChromeOS Android. This is because on 32-bit the volatile 64-bit
    loads gets split into 2 32-bit loads each.
    
    So if we read the lower dword first and then the upper dword, it
    can happen that the upper dword is already changed but the lower
    dword isn't yet. In particular for occlusion queries this gives
    false readings, as the upper dword commonly only constains the
    ready bit.
    
    With the GCC atomic intrinsics we get a call to __atomic_load_8
    in libatomic.so which does the right thing.
    
    An alternative fix would be to  explicitly split the 32-bit loads
    in the right order and do a bunch of retries if things change, though
    that gets messy quickly and for 32-bit builds only doesn't feel worth
    it that much.
    
    CC: mesa-stable
    Reviewed-by: Samuel Pitoiset <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6933>
    (cherry picked from commit 7568c97df14f8702efcc5691cd8c2fff8f9bff49)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=285d4d07879cc3d69c737d0f4125d5aa7cb12a0e
Author: Jason Ekstrand <[email protected]>
Date:   Fri Sep 25 16:29:23 2020 -0500

    nir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility
    
    Without this, it was checking bit size compatibility with bit sizes such
    as 96 which is clearly invalid.
    
    No shader-db changes on Ice Lake
    
    Fixes: ce9205c03bd20d "nir: add a load/store vectorization pass"
    Reviewed-by: Rhys Perry <[email protected]>
    Reviewed-by: Jesse Natalie <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
    (cherry picked from commit 57e7c5f05eb15adf8e4d51a7536d8267e9ff0d2d)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=1784d889f23a68ef71e99a7c7601a2e14c6baf02
Author: Philipp Zabel <[email protected]>
Date:   Tue Aug 18 15:28:41 2020 +0200

    meson: fix power8 option
    
    Do not throw a deprecation warning if the power8 option is set to the
    new 'disabled' value. Instead, warn if it is still set to the legacy
    value 'false'.
    
    Fixes: 138c003d2273 ("meson: deprecated 'true' and 'false' in combo options 
for 'enabled' and 'disabled'")
    Signed-off-by: Philipp Zabel <[email protected]>
    Reviewed-by: Vinson Lee <[email protected]>
    Reviewed-by: Eric Engestrom <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6370>
    (cherry picked from commit 03bea54e02901f188d03d5432f47fc9c57c4e12e)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=aedd29141ac2de776c41fd356f6e7cf747f0f0fa
Author: Timothy Arceri <[email protected]>
Date:   Thu Oct 1 20:23:28 2020 +1000

    glsl: don't duplicate state vars as uniforms in the NIR linker
    
    The linker was adding all state vars as uniforms, doubling the storage size
    for shaders using only builtin uniforms, which increased CPU overhead for
    constant buffer uploads.
    
    When this code was originally ported from the GLSL IR linker we forgot
    to exclude builtins because the check was not done in the
    add_uniform_to_shader class but rather a check was done when passing
    variables to this class for processing.
    
    Fixes: 664e4a610dc8 ("glsl/nir: Fill in the Parameters in NIR linker")
    
    Reviewed-by: Alejandro Piñeiro <[email protected]>
    Tested-by: Marek Olšák <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6958>
    (cherry picked from commit 038fcbcaed31b97f8f477f2496f8cf0a809b1892)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=011d569557310218d95917b6fc4c2a7c43f1f10e
Author: Jason Ekstrand <[email protected]>
Date:   Tue Sep 22 17:42:10 2020 -0500

    intel/fs: NoMask initialize the address register for shuffles
    
    Cc: [email protected]
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2979
    Tested-by: Iván Briano <[email protected]>
    Reviewed-by: Matt Turner <[email protected]>
    Reviewed-by: Francisco Jerez <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6825>
    (cherry picked from commit a8ac61b0ee2fdf4e8bc7b47aee9c24f96c40435c)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b38d1d1b25ab4853082e24e8e500cfe061ab0fb1
Author: Anuj Phogat <[email protected]>
Date:   Wed Sep 9 11:05:18 2020 -0700

    intel/gen9: Enable MSC RAW Hazard Avoidance
    
    Workaround # 22011374674
    Applied to i965, iris and anv drivers
    No performance impact is observed with WA.
    
    Cc: mesa-stable
    Signed-off-by: Anuj Phogat <[email protected]>
    Reviewed-by: Kenneth Graunke <[email protected]>
    (cherry picked from commit 545d852a7a7bc8a509d22096bdb7fb578d4bab65)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=556d6b099ea0ccc1c5e10d288049248fe1e4e163
Author: Olsak, Marek <[email protected]>
Date:   Wed Sep 30 12:19:05 2020 -0400

    radeonsi: Fix dead lock with aux_context_lock in si_screen_clear_buffer.
    
    After disable SDMA on Arcturus(gfx9), dead lock with aux_context_lock is
    detected since si_screen_clear_buffer is called recursively before
    release lock.
    
    The call trace is:
    si_clear_render_target->si_compute_clear_render_target->
    si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
    si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
    si_resource_create->si_buffer_create->si_alloc_resource->
    si_screen_clear_buffer->simple_mtx_lock->
    si_sdma_clear_buffer->si_pipe_clear_buffer->
    si_clear_buffer->si_compute_do_clear_or_copy->
    si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
    si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
    si_resource_create->si_buffer_create->si_alloc_resource->
    si_screen_clear_buffer->simple_mtx_lock
    
    Fixes: 07a49bf5976 "radeonsi: disable SDMA on gfx9"
    Signed-off-by: James Zhu <[email protected]>
    Reviewed-by: Marek Olšák <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6941>
    (cherry picked from commit 5e8791a0bf00384cbd7e3a7231bddbc48bd550a8)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed7f0f2d90eda941ee861cbc4c49f83f158fab88
Author: Dylan Baker <[email protected]>
Date:   Mon Oct 5 11:26:51 2020 -0700

    .pick_status.json: Update to e3b814d5e9e414839d5e4de3a76bb2899cbb7249

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=b971b42b149b9cfa33622c2250a1c5bda728ce42
Author: Bas Nieuwenhuizen <[email protected]>
Date:   Fri Aug 14 00:58:06 2020 +0200

    radv,radeonsi: Disable compression on interop depth images
    
    If we want to use HTILE correctly we need to communicate extra stuff
    like clear colors. (Unlike DCC there is no HTILE FCE)
    
    CC: mesa-stable
    Reviewed-by: Marek Olšák <[email protected]>
    (cherry picked from commit d78df70c2a85fd846d40b71b9e213122347bea1b)
    
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6877>

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a48475971769b320bf4d4ab02677346baa040219
Author: Jason Ekstrand <[email protected]>
Date:   Thu Sep 24 23:50:24 2020 -0500

    nir/cf: Better handle intra-block splits
    
    In the case where end was a instruction-based cursor, we would mix up
    our blocks and end up with block_begin pointing after the second split.
    This causes a segfault as the cf_node list walk at the end of the
    function never terminates properly.  There's also a possibility of
    mix-up if begin is an instruction-based cursor which was found by
    inspection.
    
    Fixes: fc7f2d2364a9 "nir/cf: add new control modification API's"
    Reviewed-by: Connor Abbott <[email protected]>
    Acked-by: Matt Turner <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
    (cherry picked from commit 7dbb1f7462433940951ce6c3fa22f6368aeafd50)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2f99a7ab73ba9b0e2a5c3db7d8323c70a4e3e75
Author: Pierre-Eric Pelloux-Prayer <[email protected]>
Date:   Tue Sep 22 14:32:13 2020 +0200

    gallium/vl: add chroma_format arg to vl_video_buffer functions
    
    vl_mpeg12_decoder needs to override the chroma_format value to get the
    correct size calculated (chroma_format is used by 
vl_video_buffer_adjust_size).
    
    I'm not sure why it's needed, but this is needed to get correct mpeg decode.
    
    Fixes: 24f2b0a8560 ("gallium/video: remove pipe_video_buffer.chroma_format")
    Acked-by: Leo Liu <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
    (cherry picked from commit 2584d48b2cf13ea50b4e6177f32bacf0c7027e79)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e84d418bd1501a956dd9920619b2af709a31e551
Author: Pierre-Eric Pelloux-Prayer <[email protected]>
Date:   Tue Sep 22 14:31:32 2020 +0200

    gallium/vl: do not call transfer_unmap if transfer is NULL
    
    CC: mesa-stable
    Acked-by: Leo Liu <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
    (cherry picked from commit b121b1b8b8f6df790dd8150a8b5e8021dc9e56bb)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=28cff4722da78a41f4b972acd9c437b546713c91
Author: Vinson Lee <[email protected]>
Date:   Mon Sep 21 18:20:25 2020 -0700

    gallium/dri2: Move image->texture assignment after image NULL check.
    
    Fix defect reported by Coverity Scan.
    
    Dereference before null check (REVERSE_INULL)
    check_after_deref: Null-checking image suggests that it may be
    null, but it has already been dereferenced on all paths leading to
    the check.
    
    Fixes: ad609bf55a87 ("frontend/dri: Implement mapping individual planes.")
    Signed-off-by: Vinson Lee <[email protected]>
    Reviewed-by: Tapani Pälli <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6807>
    (cherry picked from commit 03e7b75c22c0b3b55820be982ff9d98d704f3260)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=a0238684de1d47faba5532c3c92b604af22a3b3d
Author: Dylan Baker <[email protected]>
Date:   Wed Sep 30 09:26:48 2020 -0700

    .pick_status.json: Update to 7dbb1f7462433940951ce6c3fa22f6368aeafd50

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=79263cda925e4de5a5eb7dde9459a0d630037e26
Author: Connor Abbott <[email protected]>
Date:   Fri Aug 21 15:51:47 2020 +0200

    nir/lower_io_arrays: Fix xfb_offset bug
    
    I noticed this once I started gathering xfb_info after
    nir_lower_io_arrays_to_elements_no_indirect.
    
    Fixes: b2bbd978d0b ("nir: fix lowering arrays to elements for XFB outputs")
    Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
    (cherry picked from commit 5a88db682e08b5e58b40653872569f5b5d77777d)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=09c31b46d39bf05e10b791dd0793091ab1366327
Author: Erik Faye-Lund <[email protected]>
Date:   Mon Sep 28 16:11:38 2020 +0200

    st/mesa: use roundf instead of floorf for lod-bias rounding
    
    There's no good reason not to use a symmetric rounding mode here. This
    fixes the following GL CTS case for me:
    
    GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_all
    
    Fixes: 132b69c4edb ("st/mesa: round lod_bias to a multiple of 1/256")
    Reviewed-by: Marek Olšák <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6892>
    (cherry picked from commit 7685c37bf47104497d70c4580abb9e050ea8100f)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=0c9b64f9f4bfba79f1a56fbf6b902caac197d766
Author: Dylan Baker <[email protected]>
Date:   Tue Sep 22 09:02:46 2020 -0700

    meson/anv: Use variable that checks for --build-id
    
    fixes: d1992255bb29054fa51763376d125183a9f602f3
           ("meson: Add build Intel "anv" vulkan driver")
    
    Acked-by: Jason Ekstrand <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6819>
    (cherry picked from commit 465460943a2bf049e83a602d70f921775245dbca)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=e2ee71614f20201eab2f18a64e2bee3630a81c99
Author: Nanley Chery <[email protected]>
Date:   Thu Sep 24 10:01:11 2020 -0700

    blorp: Ensure aligned HIZ_CCS_WT partial clears
    
    Fixes: 5425fcf2cb3 ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments")
    Reported-by: Sagar Ghuge <[email protected]>
    Tested-by: Ivan Briano <[email protected]>
    Reviewed-by: Jason Ekstrand <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6854>
    (cherry picked from commit 7f3e881c6cd179a9a541a673f0fc67ef63e50cea)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=da7f4b5ada922f62e46d4bd9cc07222a228643ff
Author: Jason Ekstrand <[email protected]>
Date:   Tue Sep 22 16:56:42 2020 -0500

    nir/liveness: Consider if uses in nir_ssa_defs_interfere
    
    Fixes: f86902e75d9 "nir: Add an SSA-based liveness analysis pass"
    Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3428
    Reviewed-by: Eric Anholt <[email protected]>
    Reviewed-by: Yevhenii Kharchenko <[email protected]>
    Reviewed-by: Connor Abbott <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6824>
    (cherry picked from commit 0206fb39418786e069088c513bf392d564d3d0f9)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=401e03925d0bdcd761e6bbfa0a2825de59c08a8d
Author: Marek Olšák <[email protected]>
Date:   Thu Sep 17 19:45:14 2020 -0400

    radeonsi: fix indirect dispatches with variable block sizes
    
    The block size input was uninitialized.
    
    Fixes: 77c81164bc1c "radeonsi: support ARB_compute_variable_group_size"
    
    Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
    (cherry picked from commit 8be46d6558e04f5dc9b8bebd31a36b1f3d593aa6)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=fbbd66dcad05cec8548b9d77edc2e2eab09bc675
Author: Christian Gmeiner <[email protected]>
Date:   Sat Jan 4 07:13:47 2020 +0100

    etnaviv: simplify linear stride implementation
    
    As documented in the galcore kernel driver "only LOD0 is valid
    for this register". This makes sense, as NTE's LINEAR_STRIDE is
    only capable to store one linear stride value per sampler.
    This fixes linear textures in sampler slot != 0.
    
    Fixes: 34458c1cf6c ("etnaviv: add linear sampling support")
    CC: <[email protected]>
    Signed-off-by: Christian Gmeiner <[email protected]>
    Reviewed-by: Michael Tretter <[email protected]>
    Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3285>
    (cherry picked from commit a7e3cc7a0eafc1076a2f7775f754e74584fc3537)

URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d82aa3bf603c37082c1b2291e81a8aad0a62a1e1
Author: Dylan Baker <[email protected]>
Date:   Tue Sep 29 08:54:46 2020 -0700

    .pick_status.json: Update to 291cfb1e41513008a5be08be95399373a7de206d

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