Module: Mesa Branch: master Commit: cb12879401b88dd0712771cac137ed04886b2836 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=cb12879401b88dd0712771cac137ed04886b2836
Author: Daniel Schürmann <[email protected]> Date: Tue Oct 27 11:35:27 2020 +0100 aco: fix GFX8 16-bit packing def.physReg() was uninitialized. Reviewed-by: Rhys Perry <[email protected]> Fixes: d96f387e7ac448b450091b900ab089eea3eb7b86 ('aco: improve code sequences for 16bit packing') Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7334> --- src/amd/compiler/aco_lower_to_hw_instr.cpp | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/amd/compiler/aco_lower_to_hw_instr.cpp b/src/amd/compiler/aco_lower_to_hw_instr.cpp index 6a60714bf9a..3c3d67095e1 100644 --- a/src/amd/compiler/aco_lower_to_hw_instr.cpp +++ b/src/amd/compiler/aco_lower_to_hw_instr.cpp @@ -1217,17 +1217,17 @@ void do_pack_2x16(lower_context *ctx, Builder& bld, Definition def, Operand lo, /* either lo or hi can be placed with just a v_mov */ assert(lo.physReg().byte() == 0 || hi.physReg().byte() == 2); Operand& op = lo.physReg().byte() == 0 ? lo : hi; - Definition def = Definition(def.physReg().advance(op.physReg().byte()), v2b); - bld.vop1(aco_opcode::v_mov_b32, def, op); - op.setFixed(def.physReg()); + PhysReg reg = def.physReg().advance(op.physReg().byte()); + bld.vop1(aco_opcode::v_mov_b32, Definition(reg, v2b), op); + op.setFixed(reg); } if (ctx->program->chip_class >= GFX8) { /* either hi or lo are already placed correctly */ if (lo.physReg().reg() == def.physReg().reg()) - bld.copy(Definition(def.physReg(), v2b), Operand(hi.physReg(), v2b)); + bld.copy(def_hi, hi); else - bld.copy(Definition(def.physReg(), v2b), Operand(lo.physReg(), v2b)); + bld.copy(def_lo, lo); return; } _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
