Module: Mesa
Branch: master
Commit: 3390870cec4e3e3ea90f62f8d46cefd80417c6b9
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=3390870cec4e3e3ea90f62f8d46cefd80417c6b9

Author: Eric Anholt <[email protected]>
Date:   Tue Nov 17 12:13:54 2020 -0800

freedreno: Fix release build warnings for asserted temp vars.

Reviewed-by: Rob Clark <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7664>

---

 src/gallium/drivers/freedreno/a2xx/ir2_nir.c       | 6 +++---
 src/gallium/drivers/freedreno/a6xx/fd6_blitter.c   | 2 +-
 src/gallium/drivers/freedreno/freedreno_query_hw.c | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c 
b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
index 6cf95d5f4e3..4f25ad90688 100644
--- a/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
+++ b/src/gallium/drivers/freedreno/a2xx/ir2_nir.c
@@ -588,7 +588,7 @@ static void
 emit_intrinsic(struct ir2_context *ctx, nir_intrinsic_instr *intr)
 {
        struct ir2_instr *instr;
-       nir_const_value *const_offset;
+       ASSERTED nir_const_value *const_offset;
        unsigned idx;
 
        switch (intr->intrinsic) {
@@ -602,7 +602,7 @@ emit_intrinsic(struct ir2_context *ctx, nir_intrinsic_instr 
*intr)
                const_offset = nir_src_as_const_value(intr->src[0]);
                assert(const_offset); /* TODO can be false in ES2? */
                idx = nir_intrinsic_base(intr);
-               idx += (uint32_t) nir_src_as_const_value(intr->src[0])[0].f32;
+               idx += (uint32_t)const_offset[0].f32;
                instr = instr_create_alu_dest(ctx, nir_op_mov, &intr->dest);
                instr->src[0] = ir2_src(idx, 0, IR2_SRC_CONST);
                break;
@@ -749,7 +749,7 @@ static void
 setup_input(struct ir2_context *ctx, nir_variable * in)
 {
        struct fd2_shader_stateobj *so = ctx->so;
-       unsigned array_len = MAX2(glsl_get_length(in->type), 1);
+       ASSERTED unsigned array_len = MAX2(glsl_get_length(in->type), 1);
        unsigned n = in->data.driver_location;
        unsigned slot = in->data.location;
 
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c 
b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index e60de0bb46c..01b540ea252 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -808,7 +808,7 @@ handle_rgba_blit(struct fd_context *ctx, const struct 
pipe_blit_info *info)
 
        fd_screen_unlock(ctx->screen);
 
-       bool ret = fd_batch_lock_submit(batch);
+       ASSERTED bool ret = fd_batch_lock_submit(batch);
        assert(ret);
 
        /* Clearing last_fence must come after the batch dependency tracking
diff --git a/src/gallium/drivers/freedreno/freedreno_query_hw.c 
b/src/gallium/drivers/freedreno/freedreno_query_hw.c
index 43d1739cec6..3f4be2923ff 100644
--- a/src/gallium/drivers/freedreno/freedreno_query_hw.c
+++ b/src/gallium/drivers/freedreno/freedreno_query_hw.c
@@ -97,7 +97,7 @@ static void
 pause_query(struct fd_batch *batch, struct fd_hw_query *hq,
                struct fd_ringbuffer *ring)
 {
-       int idx = pidx(hq->provider->query_type);
+       ASSERTED int idx = pidx(hq->provider->query_type);
        DBG("%p", hq);
        assert(idx >= 0);   /* query never would have been created otherwise */
        assert(hq->period && !hq->period->end);
@@ -231,7 +231,7 @@ fd_hw_get_query_result(struct fd_context *ctx, struct 
fd_query *q,
        /* sum the result across all sample periods: */
        LIST_FOR_EACH_ENTRY(period, &hq->periods, list) {
                struct fd_hw_sample *start = period->start;
-               struct fd_hw_sample *end = period->end;
+               ASSERTED struct fd_hw_sample *end = period->end;
                unsigned i;
 
                /* start and end samples should be from same batch: */

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