Mesa (staging/21.0): zink: respect fragment-shader depth-layout

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Module: Mesa
Branch: staging/21.0
Commit: d50b941c4641846a11147b478f2fd411d51330c3
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=d50b941c4641846a11147b478f2fd411d51330c3

Author: Erik Faye-Lund <erik.faye-l...@collabora.com>
Date:   Fri Jan 22 11:42:18 2021 +0100

zink: respect fragment-shader depth-layout

This is required by GLSL 1.30 and later, so we should also respect the
setting.

Fixes: 6785d8c4601 ("zink: expose GLSL 1.30")
Reviewed-By: Mike Blumenkrantz <michael.blumenkra...@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8655>

---

 src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c 
b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
index 148acc388d3..5ee0de23cbb 100644
--- a/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
+++ b/src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c
@@ -2677,6 +2677,24 @@ get_output_prim_type_mode(uint16_t type)
    return 0;
 }
 
+static SpvExecutionMode
+get_depth_layout_mode(enum gl_frag_depth_layout depth_layout)
+{
+   switch (depth_layout) {
+   case FRAG_DEPTH_LAYOUT_NONE:
+   case FRAG_DEPTH_LAYOUT_ANY:
+      return SpvExecutionModeDepthReplacing;
+   case FRAG_DEPTH_LAYOUT_GREATER:
+      return SpvExecutionModeDepthGreater;
+   case FRAG_DEPTH_LAYOUT_LESS:
+      return SpvExecutionModeDepthLess;
+   case FRAG_DEPTH_LAYOUT_UNCHANGED:
+      return SpvExecutionModeDepthUnchanged;
+   default:
+      unreachable("unexpected depth layout");
+   }
+}
+
 struct spirv_shader *
 nir_to_spirv(struct nir_shader *s, const struct zink_so_info *so_info,
              unsigned char *shader_slot_map, unsigned char 
*shader_slots_reserved)
@@ -2814,7 +2832,7 @@ nir_to_spirv(struct nir_shader *s, const struct 
zink_so_info *so_info,
                                    SpvExecutionModeOriginUpperLeft);
       if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
          spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
-                                      SpvExecutionModeDepthReplacing);
+                                      
get_depth_layout_mode(s->info.fs.depth_layout));
       break;
    case MESA_SHADER_TESS_CTRL:
       spirv_builder_emit_exec_mode_literal(&ctx.builder, entry_point, 
SpvExecutionModeOutputVertices, s->info.tess.tcs_vertices_out);

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