Module: Mesa Branch: master Commit: aa077ba3a214479affe6dcc5fe3fe7cfe6a4d95a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=aa077ba3a214479affe6dcc5fe3fe7cfe6a4d95a
Author: Pierre-Eric Pelloux-Prayer <[email protected]> Date: Mon Mar 15 12:49:49 2021 +0100 radeonsi/rgp: export barriers Wrap the si_cp_wait_mem call to emit RGP_SQTT_MARKER_IDENTIFIER_BARRIER_START and RGP_SQTT_MARKER_IDENTIFIER_BARRIER_END events. Only for gfx9+ for now. Reviewed-by: Marek Olšák <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10105> --- src/gallium/drivers/radeonsi/si_gfx_cs.c | 18 +++++++++++ src/gallium/drivers/radeonsi/si_pipe.h | 4 +++ src/gallium/drivers/radeonsi/si_sqtt.c | 52 ++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+) diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c index 35af5c9d4d2..71972d4d126 100644 --- a/src/gallium/drivers/radeonsi/si_gfx_cs.c +++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c @@ -744,7 +744,16 @@ void gfx10_emit_cache_flush(struct si_context *ctx, struct radeon_cmdbuf *cs) EOP_DST_SEL_MEM, EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM, EOP_DATA_SEL_VALUE_32BIT, wait_mem_scratch, va, ctx->wait_mem_number, SI_NOT_QUERY); + + if (unlikely(ctx->thread_trace_enabled)) { + si_sqtt_describe_barrier_start(ctx, &ctx->gfx_cs); + } + si_cp_wait_mem(ctx, cs, va, ctx->wait_mem_number, 0xffffffff, WAIT_REG_MEM_EQUAL); + + if (unlikely(ctx->thread_trace_enabled)) { + si_sqtt_describe_barrier_end(ctx, &ctx->gfx_cs, flags); + } } radeon_begin_again(cs); @@ -953,7 +962,16 @@ void si_emit_cache_flush(struct si_context *sctx, struct radeon_cmdbuf *cs) si_cp_release_mem(sctx, cs, cb_db_event, tc_flags, EOP_DST_SEL_MEM, EOP_INT_SEL_SEND_DATA_AFTER_WR_CONFIRM, EOP_DATA_SEL_VALUE_32BIT, wait_mem_scratch, va, sctx->wait_mem_number, SI_NOT_QUERY); + + if (unlikely(sctx->thread_trace_enabled)) { + si_sqtt_describe_barrier_start(sctx, &sctx->gfx_cs); + } + si_cp_wait_mem(sctx, cs, va, sctx->wait_mem_number, 0xffffffff, WAIT_REG_MEM_EQUAL); + + if (unlikely(sctx->thread_trace_enabled)) { + si_sqtt_describe_barrier_end(sctx, &sctx->gfx_cs, sctx->flags); + } } /* GFX6-GFX8 only: diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index f610e5460d4..f807263357e 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1617,6 +1617,10 @@ void si_write_user_event(struct si_context* sctx, struct radeon_cmdbuf *rcs, enum rgp_sqtt_marker_user_event_type type, const char *str, int len); +void +si_sqtt_describe_barrier_start(struct si_context* sctx, struct radeon_cmdbuf *rcs); +void +si_sqtt_describe_barrier_end(struct si_context* sctx, struct radeon_cmdbuf *rcs, unsigned flags); bool si_init_thread_trace(struct si_context *sctx); void si_destroy_thread_trace(struct si_context *sctx); void si_handle_thread_trace(struct si_context *sctx, struct radeon_cmdbuf *rcs); diff --git a/src/gallium/drivers/radeonsi/si_sqtt.c b/src/gallium/drivers/radeonsi/si_sqtt.c index c723e0019c5..19f18db4cca 100644 --- a/src/gallium/drivers/radeonsi/si_sqtt.c +++ b/src/gallium/drivers/radeonsi/si_sqtt.c @@ -811,6 +811,58 @@ si_write_event_with_dims_marker(struct si_context* sctx, struct radeon_cmdbuf *r sctx->sqtt_next_event = EventInvalid; } +void +si_sqtt_describe_barrier_start(struct si_context* sctx, struct radeon_cmdbuf *rcs) +{ + struct rgp_sqtt_marker_barrier_start marker = {0}; + + marker.identifier = RGP_SQTT_MARKER_IDENTIFIER_BARRIER_START; + marker.cb_id = 0; + marker.dword02 = 0xC0000000 + 10; /* RGP_BARRIER_INTERNAL_BASE */ + + si_emit_thread_trace_userdata(sctx, rcs, &marker, sizeof(marker) / 4); +} + +void +si_sqtt_describe_barrier_end(struct si_context* sctx, struct radeon_cmdbuf *rcs, + unsigned flags) +{ + struct rgp_sqtt_marker_barrier_end marker = {0}; + + marker.identifier = RGP_SQTT_MARKER_IDENTIFIER_BARRIER_END; + marker.cb_id = 0; + + if (flags & SI_CONTEXT_VS_PARTIAL_FLUSH) + marker.vs_partial_flush = true; + if (flags & SI_CONTEXT_PS_PARTIAL_FLUSH) + marker.ps_partial_flush = true; + if (flags & SI_CONTEXT_CS_PARTIAL_FLUSH) + marker.cs_partial_flush = true; + + if (flags & SI_CONTEXT_PFP_SYNC_ME) + marker.pfp_sync_me = true; + + if (flags & SI_CONTEXT_INV_VCACHE) + marker.inval_tcp = true; + if (flags & SI_CONTEXT_INV_ICACHE) + marker.inval_sqI = true; + if (flags & SI_CONTEXT_INV_SCACHE) + marker.inval_sqK = true; + if (flags & SI_CONTEXT_INV_L2) + marker.inval_tcc = true; + + if (flags & SI_CONTEXT_FLUSH_AND_INV_CB) { + marker.inval_cb = true; + marker.flush_cb = true; + } + if (flags & SI_CONTEXT_FLUSH_AND_INV_DB) { + marker.inval_db = true; + marker.flush_db = true; + } + + si_emit_thread_trace_userdata(sctx, rcs, &marker, sizeof(marker) / 4); +} + void si_write_user_event(struct si_context* sctx, struct radeon_cmdbuf *rcs, enum rgp_sqtt_marker_user_event_type type, _______________________________________________ mesa-commit mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/mesa-commit
