Module: Mesa Branch: staging/21.2 Commit: ed5d9cf393fac8ba7fffbc8dcfcf1a4eb8266cfd URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed5d9cf393fac8ba7fffbc8dcfcf1a4eb8266cfd
Author: Ian Romanick <[email protected]> Date: Wed Jul 28 18:16:24 2021 -0700 nir/lower_bit_size: Support add_sat and sub_sat Without this, lowered saturating ALU instructions would only clamp to the range of the new type instead of the range of the old type. v2: Use nir_iclamp. Suggested by Jason. Use new u_{int,uint}N_{min,max}() helpers. Fixes: 090e2824079 ("nir: Add a saturated unsigned integer add opcode") Reviewed-by: Jason Ekstrand <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12142> (cherry picked from commit 7d8bf7c167d962421d1f8af451b82188357926af) --- .pick_status.json | 2 +- src/compiler/nir/nir_lower_bit_size.c | 17 +++++++++++++++++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index c7dd303cfc2..3b1470228d5 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1120,7 +1120,7 @@ "description": "nir/lower_bit_size: Support add_sat and sub_sat", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "090e28240795ce83ef63f2da768a80ca65b03ec7" }, diff --git a/src/compiler/nir/nir_lower_bit_size.c b/src/compiler/nir/nir_lower_bit_size.c index 5473ea7c0c5..c59b30454e3 100644 --- a/src/compiler/nir/nir_lower_bit_size.c +++ b/src/compiler/nir/nir_lower_bit_size.c @@ -81,6 +81,23 @@ lower_alu_instr(nir_builder *bld, nir_alu_instr *alu, unsigned bit_size) lowered_dst = nir_ishr_imm(bld, lowered_dst, dst_bit_size); } else { lowered_dst = nir_build_alu_src_arr(bld, op, srcs); + + /* The add_sat and sub_sat instructions need to clamp the result to the + * range of the original type. + */ + if (op == nir_op_iadd_sat || op == nir_op_isub_sat) { + const int64_t int_max = u_intN_max(dst_bit_size); + const int64_t int_min = u_intN_min(dst_bit_size); + + lowered_dst = nir_iclamp(bld, lowered_dst, + nir_imm_intN_t(bld, int_min, bit_size), + nir_imm_intN_t(bld, int_max, bit_size)); + } else if (op == nir_op_uadd_sat || op == nir_op_usub_sat) { + const uint64_t uint_max = u_uintN_max(dst_bit_size); + + lowered_dst = nir_umin(bld, lowered_dst, + nir_imm_intN_t(bld, uint_max, bit_size)); + } }
