Module: Mesa Branch: main Commit: 92556d6067503a503bc78290ecbc5ee6dd328e0a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=92556d6067503a503bc78290ecbc5ee6dd328e0a
Author: Timur Kristóf <[email protected]> Date: Thu Oct 28 16:41:41 2021 +0200 aco: Add 1D workgroup_id support for mesh shaders. I'll add support for 3D workgroup_id later, but NV_mesh_shader only supports 1D workgroups. Signed-off-by: Timur Kristóf <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13580> --- src/amd/compiler/aco_instruction_selection.cpp | 23 +++++++++++++++++------ 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index c4637a6d39e..9e01e2965d3 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -8216,12 +8216,23 @@ visit_intrinsic(isel_context* ctx, nir_intrinsic_instr* instr) } case nir_intrinsic_load_workgroup_id: { Temp dst = get_ssa_temp(ctx, &instr->dest.ssa); - const struct ac_arg* args = ctx->args->ac.workgroup_ids; - bld.pseudo(aco_opcode::p_create_vector, Definition(dst), - args[0].used ? Operand(get_arg(ctx, args[0])) : Operand::zero(), - args[1].used ? Operand(get_arg(ctx, args[1])) : Operand::zero(), - args[2].used ? Operand(get_arg(ctx, args[2])) : Operand::zero()); - emit_split_vector(ctx, dst, 3); + if (ctx->stage.hw == HWStage::CS) { + const struct ac_arg* ids = ctx->args->ac.workgroup_ids; + bld.pseudo(aco_opcode::p_create_vector, Definition(dst), + ids[0].used ? Operand(get_arg(ctx, ids[0])) : Operand::zero(), + ids[1].used ? Operand(get_arg(ctx, ids[1])) : Operand::zero(), + ids[2].used ? Operand(get_arg(ctx, ids[2])) : Operand::zero()); + emit_split_vector(ctx, dst, 3); + } else if (ctx->stage == mesh_ngg) { + /* TODO: support 3 dimensional workgroup IDs properly. */ + Temp idx_arg = get_arg(ctx, ctx->args->ac.vertex_id); + Temp base_arg = get_arg(ctx, ctx->args->ac.base_vertex); + Temp idx = bld.vop1(aco_opcode::v_readfirstlane_b32, bld.def(s1), idx_arg); + Temp workgroup_index = bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.def(s1, scc), idx, base_arg); + Temp one = bld.copy(bld.def(s1), Operand::c32(1)); + Temp workgroup_ids[3] = {workgroup_index, one, one}; + create_vec_from_array(ctx, workgroup_ids, 3, RegType::sgpr, 4, 0, dst); + } break; } case nir_intrinsic_load_local_invocation_index: {
