Module: Mesa Branch: staging/22.0 Commit: ed36331926befebab91e0f10e9c2203bca3abebb URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ed36331926befebab91e0f10e9c2203bca3abebb
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue Mar 29 18:48:34 2022 +0200 radv: suspend/resume queries during internal driver operations Pipeline statistics and occlusion queries shouldn't be enabled for internal driver operations like clears. Transform feedback queries don't have to be suspended because the driver doesn't use streamout. This fixes a bunch of Zink failures. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Reviewed-By: Mike Blumenkrantz <michael.blumenkra...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15660> (cherry picked from commit 738a6760e3723978877bc6ffc02a3792d4c4b3d6) Conflicts: src/gallium/drivers/zink/ci/zink-radv-fails.txt --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 4 +-- src/amd/vulkan/radv_meta.c | 34 +++++++++++++++++++++++++ src/amd/vulkan/radv_private.h | 2 +- src/amd/vulkan/radv_query.c | 6 ++--- src/gallium/drivers/zink/ci/zink-radv-fails.txt | 9 ------- 6 files changed, 41 insertions(+), 16 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 5462f46550d..f73233733ea 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -6580,7 +6580,7 @@ "description": "radv: suspend/resume queries during internal driver operations", "nominated": true, "nomination_type": 0, - "resolution": 5, + "resolution": 1, "because_sha": null }, { diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index c6ab3911ba4..0dfabfdd97a 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -2658,14 +2658,14 @@ radv_emit_index_buffer(struct radv_cmd_buffer *cmd_buffer, bool indirect) } void -radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer) +radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer, bool enable_occlusion_queries) { bool has_perfect_queries = cmd_buffer->state.perfect_occlusion_queries_enabled; struct radv_pipeline *pipeline = cmd_buffer->state.pipeline; uint32_t pa_sc_mode_cntl_1 = pipeline ? pipeline->graphics.ms.pa_sc_mode_cntl_1 : 0; uint32_t db_count_control; - if (!cmd_buffer->state.active_occlusion_queries) { + if (!enable_occlusion_queries) { if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX7) { if (G_028A4C_OUT_OF_ORDER_PRIMITIVE_ENABLE(pa_sc_mode_cntl_1) && pipeline->graphics.disable_out_of_order_rast_for_occlusion && has_perfect_queries) { diff --git a/src/amd/vulkan/radv_meta.c b/src/amd/vulkan/radv_meta.c index 56c7271109e..2ee802d3571 100644 --- a/src/amd/vulkan/radv_meta.c +++ b/src/amd/vulkan/radv_meta.c @@ -34,6 +34,36 @@ #endif #include <sys/stat.h> +static void +radv_suspend_queries(struct radv_cmd_buffer *cmd_buffer) +{ + /* Pipeline statistics queries. */ + if (cmd_buffer->state.active_pipeline_queries > 0) { + cmd_buffer->state.flush_bits &= ~RADV_CMD_FLAG_START_PIPELINE_STATS; + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_STOP_PIPELINE_STATS; + } + + /* Occlusion queries. */ + if (cmd_buffer->state.active_occlusion_queries > 0) { + radv_set_db_count_control(cmd_buffer, false); + } +} + +static void +radv_resume_queries(struct radv_cmd_buffer *cmd_buffer) +{ + /* Pipeline statistics queries. */ + if (cmd_buffer->state.active_pipeline_queries > 0) { + cmd_buffer->state.flush_bits &= ~RADV_CMD_FLAG_STOP_PIPELINE_STATS; + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_START_PIPELINE_STATS; + } + + /* Occlusion queries. */ + if (cmd_buffer->state.active_occlusion_queries > 0) { + radv_set_db_count_control(cmd_buffer, true); + } +} + void radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_buffer, uint32_t flags) @@ -135,6 +165,8 @@ radv_meta_save(struct radv_meta_saved_state *state, struct radv_cmd_buffer *cmd_ state->attachments = cmd_buffer->state.attachments; state->render_area = cmd_buffer->state.render_area; } + + radv_suspend_queries(cmd_buffer); } void @@ -255,6 +287,8 @@ radv_meta_restore(const struct radv_meta_saved_state *state, struct radv_cmd_buf if (state->subpass) cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER; } + + radv_resume_queries(cmd_buffer); } VkImageViewType diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index c547e74825d..8b795184592 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1589,7 +1589,7 @@ void si_cp_dma_clear_buffer(struct radv_cmd_buffer *cmd_buffer, uint64_t va, uin unsigned value); void si_cp_dma_wait_for_idle(struct radv_cmd_buffer *cmd_buffer); -void radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer); +void radv_set_db_count_control(struct radv_cmd_buffer *cmd_buffer, bool enable_occlusion_queries); unsigned radv_instance_rate_prolog_index(unsigned num_attributes, uint32_t instance_rate_inputs); uint32_t radv_hash_vs_prolog(const void *key_); diff --git a/src/amd/vulkan/radv_query.c b/src/amd/vulkan/radv_query.c index 254a5ee0551..e4864eddb12 100644 --- a/src/amd/vulkan/radv_query.c +++ b/src/amd/vulkan/radv_query.c @@ -1389,7 +1389,7 @@ emit_begin_query(struct radv_cmd_buffer *cmd_buffer, struct radv_query_pool *poo cmd_buffer->state.perfect_occlusion_queries_enabled = true; } - radv_set_db_count_control(cmd_buffer); + radv_set_db_count_control(cmd_buffer, true); } else { if ((flags & VK_QUERY_CONTROL_PRECISE_BIT) && !cmd_buffer->state.perfect_occlusion_queries_enabled) { @@ -1399,7 +1399,7 @@ emit_begin_query(struct radv_cmd_buffer *cmd_buffer, struct radv_query_pool *poo */ cmd_buffer->state.perfect_occlusion_queries_enabled = true; - radv_set_db_count_control(cmd_buffer); + radv_set_db_count_control(cmd_buffer, true); } } @@ -1472,7 +1472,7 @@ emit_end_query(struct radv_cmd_buffer *cmd_buffer, struct radv_query_pool *pool, cmd_buffer->state.active_occlusion_queries--; if (cmd_buffer->state.active_occlusion_queries == 0) { - radv_set_db_count_control(cmd_buffer); + radv_set_db_count_control(cmd_buffer, false); /* Reset the perfect occlusion queries hint now that no * queries are active. diff --git a/src/gallium/drivers/zink/ci/zink-radv-fails.txt b/src/gallium/drivers/zink/ci/zink-radv-fails.txt index 04988b95536..e35710c3192 100644 --- a/src/gallium/drivers/zink/ci/zink-radv-fails.txt +++ b/src/gallium/drivers/zink/ci/zink-radv-fails.txt @@ -24,15 +24,6 @@ dEQP-GLES3.functional.multisample.fbo_8_samples.proportionality_sample_coverage, dEQP-GLES3.functional.multisample.fbo_8_samples.sample_coverage_invert,Fail dEQP-GLES3.functional.multisample.fbo_max_samples.proportionality_sample_coverage,Fail dEQP-GLES3.functional.multisample.fbo_max_samples.sample_coverage_invert,Fail -dEQP-GLES3.functional.occlusion_query.depth_clear,Fail -dEQP-GLES3.functional.occlusion_query.depth_clear_stencil_clear,Fail -dEQP-GLES3.functional.occlusion_query.depth_write_depth_clear_stencil_clear,Fail -dEQP-GLES3.functional.occlusion_query.scissor,Fail -dEQP-GLES3.functional.occlusion_query.scissor_depth_clear,Fail -dEQP-GLES3.functional.occlusion_query.scissor_depth_clear_stencil_clear,Fail -dEQP-GLES3.functional.occlusion_query.scissor_depth_write_depth_clear_stencil_clear,Fail -dEQP-GLES3.functional.occlusion_query.scissor_stencil_clear,Fail -dEQP-GLES3.functional.occlusion_query.stencil_clear,Fail dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units,Fail dEQP-GLES3.functional.rasterization.primitives.line_loop_wide,Fail dEQP-GLES3.functional.rasterization.primitives.line_strip_wide,Fail