Module: Mesa Branch: main Commit: 4642e268e2e32759a9dc4fcf8b42fc20ba660c5a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4642e268e2e32759a9dc4fcf8b42fc20ba660c5a
Author: Samuel Pitoiset <[email protected]> Date: Tue May 24 12:04:19 2022 +0200 radv: move active_stages to radv_graphics_pipeline Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16688> --- src/amd/vulkan/radv_cmd_buffer.c | 2 +- src/amd/vulkan/radv_debug.c | 11 +++++++++-- src/amd/vulkan/radv_pipeline.c | 10 ++++------ src/amd/vulkan/radv_private.h | 3 ++- 4 files changed, 16 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 8f972003f11..1f3fe4a8e88 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -5189,7 +5189,7 @@ radv_CmdBindPipeline(VkCommandBuffer commandBuffer, VkPipelineBindPoint pipeline cmd_buffer->state.mesh_shading = mesh_shading; cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE | RADV_CMD_DIRTY_DYNAMIC_VERTEX_INPUT; - cmd_buffer->push_constant_stages |= pipeline->active_stages; + cmd_buffer->push_constant_stages |= graphics_pipeline->active_stages; /* the new vertex shader might not have the same user regs */ if (vtx_emit_count_changed) { diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index d2f5469eaa1..329e8c642d2 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -527,11 +527,18 @@ radv_dump_queue_state(struct radv_queue *queue, const char *dump_dir, FILE *f) pipeline = radv_get_saved_pipeline(queue->device, ring); if (pipeline) { struct radv_graphics_pipeline *graphics_pipeline = radv_pipeline_to_graphics(pipeline); + VkShaderStageFlags active_stages; + + if (pipeline->type == RADV_PIPELINE_GRAPHICS) { + active_stages = graphics_pipeline->active_stages; + } else { + active_stages = VK_SHADER_STAGE_COMPUTE_BIT; + } radv_dump_vs_prolog(pipeline, f); - radv_dump_shaders(pipeline, pipeline->active_stages, dump_dir, f); + radv_dump_shaders(pipeline, active_stages, dump_dir, f); if (!(queue->device->instance->debug_flags & RADV_DEBUG_NO_UMR)) - radv_dump_annotated_shaders(pipeline, pipeline->active_stages, f); + radv_dump_annotated_shaders(pipeline, active_stages, f); radv_dump_vertex_descriptors(graphics_pipeline, f); radv_dump_descriptors(queue->device, f); } diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index 7f49541d582..f71206fe0e5 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1555,7 +1555,7 @@ radv_pipeline_init_vertex_input_info(struct radv_graphics_pipeline *pipeline, struct radv_vertex_input_info info = {0}; /* Vertex input interface structs have to be ignored if the pipeline includes a mesh shader. */ - if (pipeline->base.active_stages & VK_SHADER_STAGE_MESH_BIT_NV) + if (pipeline->active_stages & VK_SHADER_STAGE_MESH_BIT_NV) return info; if (!(pipeline->dynamic_states & RADV_DYNAMIC_VERTEX_INPUT)) { @@ -1672,7 +1672,7 @@ radv_pipeline_init_tessellation_info(struct radv_graphics_pipeline *pipeline, VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT; struct radv_tessellation_info info = {0}; - if ((pipeline->base.active_stages & tess_stages) == tess_stages) { + if ((pipeline->active_stages & tess_stages) == tess_stages) { info.patch_control_points = ts->patchControlPoints; const VkPipelineTessellationDomainOriginStateCreateInfo *domain_origin_state = @@ -1766,7 +1766,7 @@ radv_pipeline_init_graphics_info(struct radv_graphics_pipeline *pipeline, struct radv_graphics_pipeline_info info = {0}; /* Vertex input interface structs have to be ignored if the pipeline includes a mesh shader. */ - if (!(pipeline->base.active_stages & VK_SHADER_STAGE_MESH_BIT_NV)) { + if (!(pipeline->active_stages & VK_SHADER_STAGE_MESH_BIT_NV)) { info.vi = radv_pipeline_init_vertex_input_info(pipeline, pCreateInfo); info.ia = radv_pipeline_init_input_assembly_info(pipeline, pCreateInfo); } @@ -6864,7 +6864,7 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) { const VkPipelineShaderStageCreateInfo *sinfo = &pCreateInfo->pStages[i]; - pipeline->base.active_stages |= sinfo->stage; + pipeline->active_stages |= sinfo->stage; } struct radv_blend_state blend = radv_pipeline_init_blend_state(pipeline, pCreateInfo); @@ -7199,8 +7199,6 @@ radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache, const VkPipelineCreationFeedbackCreateInfo *creation_feedback = vk_find_struct_const(pCreateInfo->pNext, PIPELINE_CREATION_FEEDBACK_CREATE_INFO); - pipeline->base.active_stages |= MESA_SHADER_COMPUTE; - struct radv_pipeline_key key = radv_generate_compute_pipeline_key(pipeline, pCreateInfo); UNUSED gl_shader_stage last_vgt_api_stage = MESA_SHADER_NONE; diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 724efd61678..6f8e129be6f 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -1937,7 +1937,6 @@ struct radv_pipeline { bool need_indirect_descriptor_sets; struct radv_shader *shaders[MESA_VULKAN_SHADER_STAGES]; struct radv_shader *gs_copy_shader; - VkShaderStageFlags active_stages; struct radeon_cmdbuf cs; uint32_t ctx_cs_hash; @@ -1959,6 +1958,8 @@ struct radv_pipeline { struct radv_graphics_pipeline { struct radv_pipeline base; + VkShaderStageFlags active_stages; + struct radv_dynamic_state dynamic_state; uint64_t dynamic_states;
