Module: Mesa Branch: main Commit: a26543f6368fed1604cfde7fffce2024e9d8abab URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=a26543f6368fed1604cfde7fffce2024e9d8abab
Author: Dave Airlie <[email protected]> Date: Tue Jul 26 08:13:06 2022 +1000 virgl: abstract virgl shader stages from pipe shader stages. If the gallium ones get reordered, add the abstraction to the virgl wire types. Reviewed-by: Emma Anholt <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17747> --- src/gallium/drivers/virgl/virgl_encode.c | 49 +++++++++++++++++++++++--------- src/gallium/drivers/virgl/virgl_encode.h | 13 +++++---- src/virtio/virtio-gpu/virgl_protocol.h | 9 ++++++ 3 files changed, 51 insertions(+), 20 deletions(-) diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c index c43b608f005..b09bce5cc72 100644 --- a/src/gallium/drivers/virgl/virgl_encode.c +++ b/src/gallium/drivers/virgl/virgl_encode.c @@ -481,6 +481,26 @@ int virgl_encode_rasterizer_state(struct virgl_context *ctx, return 0; } +static enum virgl_shader_stage virgl_shader_stage_convert(enum pipe_shader_type type) +{ + switch (type) { + case PIPE_SHADER_VERTEX: + return VIRGL_SHADER_VERTEX; + case PIPE_SHADER_TESS_CTRL: + return VIRGL_SHADER_TESS_CTRL; + case PIPE_SHADER_TESS_EVAL: + return VIRGL_SHADER_TESS_EVAL; + case PIPE_SHADER_GEOMETRY: + return VIRGL_SHADER_GEOMETRY; + case PIPE_SHADER_FRAGMENT: + return VIRGL_SHADER_FRAGMENT; + case PIPE_SHADER_COMPUTE: + return VIRGL_SHADER_COMPUTE; + default: + unreachable("virgl: unknown shader stage.\n"); + } +} + static void virgl_emit_shader_header(struct virgl_context *ctx, uint32_t handle, uint32_t len, uint32_t type, uint32_t offlen, @@ -523,7 +543,7 @@ static void virgl_emit_shader_streamout(struct virgl_context *ctx, int virgl_encode_shader_state(struct virgl_context *ctx, uint32_t handle, - uint32_t type, + enum pipe_shader_type type, const struct pipe_stream_output_info *so_info, uint32_t cs_req_local_mem, const struct tgsi_token *tokens) @@ -593,7 +613,7 @@ int virgl_encode_shader_state(struct virgl_context *ctx, else offlen = VIRGL_OBJ_SHADER_OFFSET_VAL((uintptr_t)sptr - (uintptr_t)str) | VIRGL_OBJ_SHADER_OFFSET_CONT; - virgl_emit_shader_header(ctx, handle, len, type, offlen, num_tokens); + virgl_emit_shader_header(ctx, handle, len, virgl_shader_stage_convert(type), offlen, num_tokens); if (type == PIPE_SHADER_COMPUTE) virgl_encoder_write_dword(ctx->cbuf, cs_req_local_mem); @@ -1015,14 +1035,14 @@ int virgl_encode_sampler_view(struct virgl_context *ctx, } int virgl_encode_set_sampler_views(struct virgl_context *ctx, - uint32_t shader_type, + enum pipe_shader_type shader_type, uint32_t start_slot, uint32_t num_views, struct virgl_sampler_view **views) { int i; virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_SAMPLER_VIEWS, 0, VIRGL_SET_SAMPLER_VIEWS_SIZE(num_views))); - virgl_encoder_write_dword(ctx->cbuf, shader_type); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader_type)); virgl_encoder_write_dword(ctx->cbuf, start_slot); for (i = 0; i < num_views; i++) { uint32_t handle = views[i] ? views[i]->handle : 0; @@ -1032,14 +1052,14 @@ int virgl_encode_set_sampler_views(struct virgl_context *ctx, } int virgl_encode_bind_sampler_states(struct virgl_context *ctx, - uint32_t shader_type, + enum pipe_shader_type shader_type, uint32_t start_slot, uint32_t num_handles, uint32_t *handles) { int i; virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BIND_SAMPLER_STATES, 0, VIRGL_BIND_SAMPLER_STATES(num_handles))); - virgl_encoder_write_dword(ctx->cbuf, shader_type); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader_type)); virgl_encoder_write_dword(ctx->cbuf, start_slot); for (i = 0; i < num_handles; i++) virgl_encoder_write_dword(ctx->cbuf, handles[i]); @@ -1047,13 +1067,13 @@ int virgl_encode_bind_sampler_states(struct virgl_context *ctx, } int virgl_encoder_write_constant_buffer(struct virgl_context *ctx, - uint32_t shader, + enum pipe_shader_type shader, uint32_t index, uint32_t size, const void *data) { virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_CONSTANT_BUFFER, 0, size + 2)); - virgl_encoder_write_dword(ctx->cbuf, shader); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader)); virgl_encoder_write_dword(ctx->cbuf, index); if (data) virgl_encoder_write_block(ctx->cbuf, data, size * 4); @@ -1061,14 +1081,14 @@ int virgl_encoder_write_constant_buffer(struct virgl_context *ctx, } int virgl_encoder_set_uniform_buffer(struct virgl_context *ctx, - uint32_t shader, + enum pipe_shader_type shader, uint32_t index, uint32_t offset, uint32_t length, struct virgl_resource *res) { virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_UNIFORM_BUFFER, 0, VIRGL_SET_UNIFORM_BUFFER_SIZE)); - virgl_encoder_write_dword(ctx->cbuf, shader); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader)); virgl_encoder_write_dword(ctx->cbuf, index); virgl_encoder_write_dword(ctx->cbuf, offset); virgl_encoder_write_dword(ctx->cbuf, length); @@ -1311,11 +1331,12 @@ int virgl_encode_link_shader(struct virgl_context *ctx, uint32_t *handles) } int virgl_encode_bind_shader(struct virgl_context *ctx, - uint32_t handle, uint32_t type) + uint32_t handle, + enum pipe_shader_type type) { virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BIND_SHADER, 0, 2)); virgl_encoder_write_dword(ctx->cbuf, handle); - virgl_encoder_write_dword(ctx->cbuf, type); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(type)); return 0; } @@ -1340,7 +1361,7 @@ int virgl_encode_set_shader_buffers(struct virgl_context *ctx, int i; virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_SHADER_BUFFERS, 0, VIRGL_SET_SHADER_BUFFER_SIZE(count))); - virgl_encoder_write_dword(ctx->cbuf, shader); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader)); virgl_encoder_write_dword(ctx->cbuf, start_slot); for (i = 0; i < count; i++) { if (buffers && buffers[i].buffer) { @@ -1396,7 +1417,7 @@ int virgl_encode_set_shader_images(struct virgl_context *ctx, int i; virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_SHADER_IMAGES, 0, VIRGL_SET_SHADER_IMAGE_SIZE(count))); - virgl_encoder_write_dword(ctx->cbuf, shader); + virgl_encoder_write_dword(ctx->cbuf, virgl_shader_stage_convert(shader)); virgl_encoder_write_dword(ctx->cbuf, start_slot); for (i = 0; i < count; i++) { if (images && images[i].resource) { diff --git a/src/gallium/drivers/virgl/virgl_encode.h b/src/gallium/drivers/virgl/virgl_encode.h index cc3fa6fdaed..dd116900599 100644 --- a/src/gallium/drivers/virgl/virgl_encode.h +++ b/src/gallium/drivers/virgl/virgl_encode.h @@ -90,7 +90,7 @@ extern int virgl_encode_rasterizer_state(struct virgl_context *ctx, extern int virgl_encode_shader_state(struct virgl_context *ctx, uint32_t handle, - uint32_t type, + enum pipe_shader_type type, const struct pipe_stream_output_info *so_info, uint32_t cs_req_local_mem, const struct tgsi_token *tokens); @@ -174,13 +174,13 @@ int virgl_encode_sampler_view(struct virgl_context *ctx, const struct pipe_sampler_view *state); int virgl_encode_set_sampler_views(struct virgl_context *ctx, - uint32_t shader_type, + enum pipe_shader_type shader_type, uint32_t start_slot, uint32_t num_views, struct virgl_sampler_view **views); int virgl_encode_bind_sampler_states(struct virgl_context *ctx, - uint32_t shader_type, + enum pipe_shader_type shader_type, uint32_t start_slot, uint32_t num_handles, uint32_t *handles); @@ -191,13 +191,13 @@ int virgl_encoder_set_index_buffer(struct virgl_context *ctx, uint32_t virgl_object_assign_handle(void); int virgl_encoder_write_constant_buffer(struct virgl_context *ctx, - uint32_t shader, + enum pipe_shader_type shader, uint32_t index, uint32_t size, const void *data); int virgl_encoder_set_uniform_buffer(struct virgl_context *ctx, - uint32_t shader, + enum pipe_shader_type shader, uint32_t index, uint32_t offset, uint32_t length, @@ -267,7 +267,8 @@ int virgl_encoder_destroy_sub_ctx(struct virgl_context *ctx, uint32_t sub_ctx_id int virgl_encode_link_shader(struct virgl_context *ctx, uint32_t *handles); int virgl_encode_bind_shader(struct virgl_context *ctx, - uint32_t handle, uint32_t type); + uint32_t handle, + enum pipe_shader_type type); int virgl_encode_set_tess_state(struct virgl_context *ctx, const float outer[4], diff --git a/src/virtio/virtio-gpu/virgl_protocol.h b/src/virtio/virtio-gpu/virgl_protocol.h index fca9b428c4f..71629538514 100644 --- a/src/virtio/virtio-gpu/virgl_protocol.h +++ b/src/virtio/virtio-gpu/virgl_protocol.h @@ -120,6 +120,15 @@ enum virgl_context_cmd { VIRGL_MAX_COMMANDS }; +enum virgl_shader_stage { + VIRGL_SHADER_VERTEX, + VIRGL_SHADER_FRAGMENT, + VIRGL_SHADER_GEOMETRY, + VIRGL_SHADER_TESS_CTRL, + VIRGL_SHADER_TESS_EVAL, + VIRGL_SHADER_COMPUTE, +}; + /* 8-bit cmd headers 8-bit object type
