Module: Mesa Branch: main Commit: 78785f3b187ec1ed00709594711e2870bfbcfe74 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=78785f3b187ec1ed00709594711e2870bfbcfe74
Author: Alyssa Rosenzweig <[email protected]> Date: Fri Oct 21 16:46:21 2022 -0400 pan/mdg: Don't schedule across memory barrier Fixes KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-cs Signed-off-by: Alyssa Rosenzweig <[email protected]> Cc: mesa-stable Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238> --- src/panfrost/midgard/midgard_compile.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index 94668b4235b..08ef81e849c 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -2164,12 +2164,15 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) emit_special(ctx, instr, 97); break; - /* Midgard doesn't seem to want special handling */ + /* Midgard doesn't seem to want special handling, though we do need to + * take care when scheduling to avoid incorrect reordering. + */ case nir_intrinsic_memory_barrier: case nir_intrinsic_memory_barrier_buffer: case nir_intrinsic_memory_barrier_image: case nir_intrinsic_memory_barrier_shared: case nir_intrinsic_group_memory_barrier: + schedule_barrier(ctx); break; case nir_intrinsic_control_barrier:
