Module: Mesa Branch: main Commit: 8d8aa05fd24d97a165aa947b7ba83e00ff3bd717 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=8d8aa05fd24d97a165aa947b7ba83e00ff3bd717
Author: Samuel Pitoiset <[email protected]> Date: Wed Oct 19 15:44:54 2022 +0200 radv: declare shader arguments/locations for provoking vertex Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Rhys Perry <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19168> --- src/amd/vulkan/radv_shader.h | 11 ++++++----- src/amd/vulkan/radv_shader_args.c | 23 +++++++++++++++++------ src/amd/vulkan/radv_shader_args.h | 1 + 3 files changed, 24 insertions(+), 11 deletions(-) diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index b8d966d6412..50dac12f52f 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -142,11 +142,12 @@ enum radv_ud_index { AC_UD_VIEW_INDEX = 4, AC_UD_STREAMOUT_BUFFERS = 5, AC_UD_NGG_QUERY_STATE = 6, - AC_UD_NGG_CULLING_SETTINGS = 7, - AC_UD_NGG_VIEWPORT = 8, - AC_UD_FORCE_VRS_RATES = 9, - AC_UD_TASK_RING_ENTRY = 10, - AC_UD_SHADER_START = 11, + AC_UD_NGG_PROVOKING_VTX = 7, + AC_UD_NGG_CULLING_SETTINGS = 8, + AC_UD_NGG_VIEWPORT = 9, + AC_UD_FORCE_VRS_RATES = 10, + AC_UD_TASK_RING_ENTRY = 11, + AC_UD_SHADER_START = 12, AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START, AC_UD_VS_BASE_VERTEX_START_INSTANCE, AC_UD_VS_PROLOG_INPUTS, diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index 94cec1bb5b9..8d91a0af6ab 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -116,12 +116,14 @@ count_ms_user_sgprs(const struct radv_shader_info *info) } static unsigned -count_ngg_sgprs(const struct radv_shader_info *info, bool has_ngg_query) +count_ngg_sgprs(const struct radv_shader_info *info, bool has_ngg_query, bool has_ngg_provoking_vtx) { unsigned count = 0; if (has_ngg_query) count += 1; /* ngg_query_state */ + if (has_ngg_provoking_vtx) + count += 1; /* ngg_provoking_vtx */ if (info->has_ngg_culling) count += 5; /* ngg_culling_settings + 4x ngg_viewport_* */ @@ -163,7 +165,7 @@ static void allocate_user_sgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info *info, struct radv_shader_args *args, gl_shader_stage stage, bool has_previous_stage, gl_shader_stage previous_stage, bool needs_view_index, bool has_ngg_query, - const struct radv_pipeline_key *key, + bool has_ngg_provoking_vtx, const struct radv_pipeline_key *key, struct user_sgpr_info *user_sgpr_info) { uint8_t user_sgpr_count = 0; @@ -221,7 +223,7 @@ allocate_user_sgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info case MESA_SHADER_GEOMETRY: if (has_previous_stage) { if (info->is_ngg) - user_sgpr_count += count_ngg_sgprs(info, has_ngg_query); + user_sgpr_count += count_ngg_sgprs(info, has_ngg_query, has_ngg_provoking_vtx); if (previous_stage == MESA_SHADER_VERTEX) { user_sgpr_count += count_vs_user_sgprs(info); @@ -481,11 +483,14 @@ declare_ps_input_vgprs(const struct radv_shader_info *info, struct radv_shader_a static void declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, - bool has_ngg_query) + bool has_ngg_query, bool has_ngg_provoking_vtx) { if (has_ngg_query) ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_query_state); + if (has_ngg_provoking_vtx) + ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_provoking_vtx); + if (info->has_ngg_culling) { ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_culling_settings); ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ngg_viewport_scale[0]); @@ -563,6 +568,8 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin bool needs_view_index = info->uses_view_index; bool has_ngg_query = info->has_ngg_prim_query || info->has_ngg_xfb_query || (stage == MESA_SHADER_GEOMETRY && info->gs.has_ngg_pipeline_stat_query); + bool has_ngg_provoking_vtx = (stage == MESA_SHADER_VERTEX || stage == MESA_SHADER_GEOMETRY) && + key->dynamic_provoking_vtx_mode; if (gfx_level >= GFX10 && info->is_ngg && stage != MESA_SHADER_GEOMETRY) { /* Handle all NGG shaders as GS to simplify the code here. */ @@ -577,7 +584,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin args->user_sgprs_locs.shader_data[i].sgpr_idx = -1; allocate_user_sgprs(gfx_level, info, args, stage, has_previous_stage, previous_stage, - needs_view_index, has_ngg_query, key, &user_sgpr_info); + needs_view_index, has_ngg_query, has_ngg_provoking_vtx, key, &user_sgpr_info); if (args->explicit_scratch_args) { ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ring_offsets); @@ -792,7 +799,7 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin } if (info->is_ngg) { - declare_ngg_sgprs(info, args, has_ngg_query); + declare_ngg_sgprs(info, args, has_ngg_query, has_ngg_provoking_vtx); } ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]); @@ -936,6 +943,10 @@ radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipelin set_loc_shader(args, AC_UD_NGG_QUERY_STATE, &user_sgpr_idx, 1); } + if (args->ngg_provoking_vtx.used) { + set_loc_shader(args, AC_UD_NGG_PROVOKING_VTX, &user_sgpr_idx, 1); + } + if (args->ngg_culling_settings.used) { set_loc_shader(args, AC_UD_NGG_CULLING_SETTINGS, &user_sgpr_idx, 1); } diff --git a/src/amd/vulkan/radv_shader_args.h b/src/amd/vulkan/radv_shader_args.h index 4cf0e643174..d8b90a755c3 100644 --- a/src/amd/vulkan/radv_shader_args.h +++ b/src/amd/vulkan/radv_shader_args.h @@ -46,6 +46,7 @@ struct radv_shader_args { /* NGG */ struct ac_arg ngg_query_state; + struct ac_arg ngg_provoking_vtx; /* NGG GS */ struct ac_arg ngg_culling_settings;
