Module: Mesa Branch: main Commit: e1f51003111b9fc9f06c948191c545164cfc86be URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e1f51003111b9fc9f06c948191c545164cfc86be
Author: Rhys Perry <[email protected]> Date: Wed Nov 9 16:21:32 2022 +0000 nir: add task_payload and shader_out to nir_var_vec_indexable_modes Since these can be cross-invocation, we need this to write individual components without race conditions or loads. Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7391 Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19597> --- src/compiler/nir/nir.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 073e6635e9f..d81c04ad2aa 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -207,10 +207,13 @@ typedef enum { nir_var_read_only_modes = nir_var_shader_in | nir_var_uniform | nir_var_system_value | nir_var_mem_constant | nir_var_mem_ubo, - /** Modes where vector derefs can be indexed as arrays */ + /* Modes where vector derefs can be indexed as arrays. nir_var_shader_out is only for mesh + * stages. + */ nir_var_vec_indexable_modes = nir_var_mem_ubo | nir_var_mem_ssbo | nir_var_mem_shared | nir_var_mem_global | - nir_var_mem_push_const, + nir_var_mem_push_const | nir_var_mem_task_payload | + nir_var_shader_out, nir_num_variable_modes = 16, nir_var_all = (1 << nir_num_variable_modes) - 1, } nir_variable_mode;
