Module: Mesa Branch: main Commit: 0768cc5ed183e3289282100958154c50b4af099f URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0768cc5ed183e3289282100958154c50b4af099f
Author: Samuel Pitoiset <[email protected]> Date: Wed Jan 4 14:38:18 2023 +0100 radv: determine DISABLE_DUAL_QUAD directly from the command buffer With dynamic color blend equations, dual-src blending will be determined from the dynamic state, better to move it there now. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20517> --- src/amd/vulkan/radv_cmd_buffer.c | 6 ++++-- src/amd/vulkan/radv_pipeline.c | 16 ++-------------- src/amd/vulkan/radv_private.h | 3 ++- 3 files changed, 8 insertions(+), 17 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index b23e9b39196..5079d675a79 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -1923,7 +1923,7 @@ radv_emit_graphics_pipeline(struct radv_cmd_buffer *cmd_buffer) if (radv_rast_prim_is_points_or_lines(cmd_buffer->state.emitted_graphics_pipeline->rast_prim) != radv_rast_prim_is_points_or_lines(pipeline->rast_prim)) cmd_buffer->state.dirty |= RADV_CMD_DIRTY_GUARDBAND; - if (cmd_buffer->state.emitted_graphics_pipeline->disable_dual_quad != pipeline->disable_dual_quad || + if (cmd_buffer->state.emitted_graphics_pipeline->mrt0_is_dual_src != pipeline->mrt0_is_dual_src || cmd_buffer->state.emitted_graphics_pipeline->custom_blend_mode != pipeline->custom_blend_mode) cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP | RADV_CMD_DIRTY_DYNAMIC_LOGIC_OP_ENABLE; @@ -2404,8 +2404,10 @@ radv_emit_logic_op(struct radv_cmd_buffer *cmd_buffer) } if (cmd_buffer->device->physical_device->rad_info.has_rbplus) { + /* RB+ doesn't work with dual source blending, logic op and CB_RESOLVE. */ cb_color_control |= - S_028808_DISABLE_DUAL_QUAD(pipeline->disable_dual_quad || d->vk.cb.logic_op_enable); + S_028808_DISABLE_DUAL_QUAD(pipeline->mrt0_is_dual_src || d->vk.cb.logic_op_enable || + pipeline->custom_blend_mode == V_028808_CB_RESOLVE); } if (pipeline->custom_blend_mode) { diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index bf817b574bd..5b8c4dc888f 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -603,7 +603,6 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline, { const struct radv_device *device = pipeline->base.device; struct radv_blend_state blend = {0}; - bool disable_dual_quad = false; const enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level; int i; @@ -703,21 +702,11 @@ radv_pipeline_init_blend_state(struct radv_graphics_pipeline *pipeline, S_028760_ALPHA_COMB_FCN(V_028760_OPT_COMB_NONE); } } - - /* RB+ doesn't work with dual source blending, logic op and - * RESOLVE. - */ - if (key->ps.epilog.mrt0_is_dual_src || - (state->cb && !(pipeline->dynamic_states & RADV_DYNAMIC_LOGIC_OP_ENABLE) && - state->cb->logic_op_enable)) - disable_dual_quad = true; } blend.cb_shader_mask = ac_get_cb_shader_mask(key->ps.epilog.spi_shader_col_format); blend.spi_shader_col_format = key->ps.epilog.spi_shader_col_format; - pipeline->disable_dual_quad = disable_dual_quad; - return blend; } @@ -5141,9 +5130,6 @@ radv_pipeline_init_extra(struct radv_graphics_pipeline *pipeline, */ blend_state->cb_shader_mask = 0xf; - if (extra->custom_blend_mode == V_028808_CB_RESOLVE) - pipeline->disable_dual_quad = true; - pipeline->custom_blend_mode = extra->custom_blend_mode; } @@ -5261,6 +5247,8 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline *pipeline, struct radv /* Copy the non-compacted SPI_SHADER_COL_FORMAT which is used to emit RBPLUS state. */ pipeline->col_format_non_compacted = blend.spi_shader_col_format; + pipeline->mrt0_is_dual_src = key.ps.epilog.mrt0_is_dual_src; + struct radv_shader *ps = pipeline->base.shaders[MESA_SHADER_FRAGMENT]; bool enable_mrt_compaction = !key.ps.epilog.mrt0_is_dual_src && !ps->info.ps.has_epilog; if (enable_mrt_compaction) { diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 15c38e7cd25..ebdda7017f6 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -2011,7 +2011,6 @@ struct radv_graphics_pipeline { struct radv_ia_multi_vgt_param_helpers ia_multi_vgt_param; uint8_t vtx_emit_num; uint64_t needed_dynamic_state; - bool disable_dual_quad; unsigned cb_blend_control[MAX_RTS]; unsigned sx_mrt_blend_opt[MAX_RTS]; uint32_t binding_stride[MAX_VBS]; @@ -2033,6 +2032,8 @@ struct radv_graphics_pipeline { /* Used for rbplus */ uint32_t col_format_non_compacted; + bool mrt0_is_dual_src; + bool uses_drawid; bool uses_baseinstance; bool use_per_attribute_vb_descs;
