Module: Mesa
Branch: main
Commit: 6ddf1fd9adc9a7745e2b7c91199e3b17e553f8b7
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=6ddf1fd9adc9a7745e2b7c91199e3b17e553f8b7

Author: Samuel Pitoiset <[email protected]>
Date:   Thu Feb  2 10:56:10 2023 +0100

radv: pass the lib flags for generating the pipeline key

No functional change.

Signed-off-by: Samuel Pitoiset <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21068>

---

 src/amd/vulkan/radv_pipeline.c | 32 +++++++++++++++++---------------
 1 file changed, 17 insertions(+), 15 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 92f382db083..fd59ce184d9 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2279,7 +2279,8 @@ radv_pipeline_generate_ps_epilog_key(const struct 
radv_graphics_pipeline *pipeli
 static struct radv_pipeline_key
 radv_generate_graphics_pipeline_key(const struct radv_graphics_pipeline 
*pipeline,
                                     const VkGraphicsPipelineCreateInfo 
*pCreateInfo,
-                                    const struct vk_graphics_pipeline_state 
*state)
+                                    const struct vk_graphics_pipeline_state 
*state,
+                                    VkGraphicsPipelineLibraryFlagBitsEXT 
lib_flags)
 {
    struct radv_device *device = pipeline->base.device;
    const struct radv_physical_device *pdevice = device->physical_device;
@@ -2291,6 +2292,12 @@ radv_generate_graphics_pipeline_key(const struct 
radv_graphics_pipeline *pipelin
       key.vs.has_prolog = true;
    }
 
+   /* Compile the pre-rasterization stages only when the vertex input 
interface is missing. */
+   if ((lib_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_PRE_RASTERIZATION_SHADERS_BIT_EXT) &&
+       !(lib_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_VERTEX_INPUT_INTERFACE_BIT_EXT)) {
+      key.vs.has_prolog = true;
+   }
+
    /* Vertex input state */
    if (state->vi) {
       u_foreach_bit(i, state->vi->attributes_valid) {
@@ -2392,6 +2399,12 @@ radv_generate_graphics_pipeline_key(const struct 
radv_graphics_pipeline *pipelin
       (!!(pipeline->active_stages & VK_SHADER_STAGE_FRAGMENT_BIT) && 
!!pipeline->ps_epilog) ||
       key.ps.dynamic_ps_epilog;
 
+   /* Compile the main FS only when the fragment shader output interface is 
missing. */
+   if ((lib_flags & VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) &&
+       !(lib_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT)) {
+      key.ps.has_epilog = true;
+   }
+
    key.dynamic_patch_control_points =
       !!(pipeline->dynamic_states & RADV_DYNAMIC_PATCH_CONTROL_POINTS);
 
@@ -4965,7 +4978,8 @@ radv_graphics_pipeline_init(struct radv_graphics_pipeline 
*pipeline, struct radv
    if (!fast_linking_enabled)
       radv_pipeline_layout_hash(&pipeline_layout);
 
-   struct radv_pipeline_key key = 
radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &state);
+   struct radv_pipeline_key key = radv_generate_graphics_pipeline_key(
+      pipeline, pCreateInfo, &state, (~imported_flags) & 
ALL_GRAPHICS_LIB_FLAGS);
 
    result = radv_graphics_pipeline_compile(pipeline, pCreateInfo, 
&pipeline_layout, device, cache,
                                            &key, (~imported_flags) & 
ALL_GRAPHICS_LIB_FLAGS,
@@ -5170,19 +5184,7 @@ radv_graphics_lib_pipeline_init(struct 
radv_graphics_lib_pipeline *pipeline,
    if (pipeline->base.active_stages != 0 ||
        (imported_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT)) {
       struct radv_pipeline_key key =
-         radv_generate_graphics_pipeline_key(&pipeline->base, pCreateInfo, 
state);
-
-      /* Compile the main FS only when the fragment shader output interface is 
missing. */
-      if ((imported_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_SHADER_BIT_EXT) &&
-          !(imported_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_FRAGMENT_OUTPUT_INTERFACE_BIT_EXT)) {
-         key.ps.has_epilog = true;
-      }
-
-      /* Compile the pre-rasterization stages only when the vertex input 
interface is missing. */
-      if ((imported_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_PRE_RASTERIZATION_SHADERS_BIT_EXT) &&
-          !(imported_flags & 
VK_GRAPHICS_PIPELINE_LIBRARY_VERTEX_INPUT_INTERFACE_BIT_EXT)) {
-         key.vs.has_prolog = true;
-      }
+         radv_generate_graphics_pipeline_key(&pipeline->base, pCreateInfo, 
state, imported_flags);
 
       result = radv_graphics_pipeline_compile(&pipeline->base, pCreateInfo, 
pipeline_layout, device,
                                               cache, &key, imported_flags, 
false,

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