Module: Mesa Branch: staging/22.3 Commit: 0a750dde41aa078ee5d334cd3e47ed299be904c4 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0a750dde41aa078ee5d334cd3e47ed299be904c4
Author: Eric Engestrom <[email protected]> Date: Tue Feb 7 08:09:53 2023 +0000 .pick_status.json: Update to 3e2c768aa860f96074df73cd3171960e76f5c312 --- .pick_status.json | 693 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 693 insertions(+) diff --git a/.pick_status.json b/.pick_status.json index 8c780581b74..d40e4c34621 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -1,4 +1,697 @@ [ + { + "sha": "3e2c768aa860f96074df73cd3171960e76f5c312", + "description": "radv/vcn: enable dynamic dpb tier 2 for h264/h265 on navi21+", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "6c3c242361da7786f4020ed63c148fcf4b868a7e", + "description": "radv/video: add h265 decode UVD support", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "db62c38091a3b244b1d720a6aa47bf1d1855db55", + "description": "radv: add vcn h265 decode.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "8a29291dbe6c61ce469f21a745724b59e702272a", + "description": "radv/video: add h264 support for uvd", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "1693c03a39630a43e179b84b6cb4dadba72721c0", + "description": "radv/video: add initial h264 decoder for VCN", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "9477f117f4d45445dd8d3ccc2497b5e4dfb48bd6", + "description": "radv/video: add initial frameworking.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "32533409169f16a5ffb9662496cd60782b7718cd", + "description": "radv: add video decoder register setup.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "85eead4198dfe2e8209dccd44b6ec5a6d8839e60", + "description": "radv: adding video decode queue support", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "30b6e9797dff5eceb34d22dad5123270811402b0", + "description": "ac: add name to codec info struct", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "ee7837aae2bfec61961cc6cbb54d0e3002a238af", + "description": "radv: add new upload alloc aligned api", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "855ad612e18b8faa0c5930cb25bba82e669c5d3a", + "description": "radv: remove the status query mark it unsupported.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "284547af55864032ad410c59027ef110efa62b42", + "description": "freedreno+ir3: Move storage_16bit to compiler options", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "79caf8a44b682f731c0fd3b941f38cc1869efe2d", + "description": "anv: Make a batch decoder for each queue family", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "1a1fa2393ec532920cefba9597774eaf49e08aa1", + "description": "v3d/v3dv: use shader_info->var_copies_lowered", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "ba0bc7182d25a16e95fa8957ffaba8b72b76fa5b", + "description": "anv: use shader_info->var_copies_lowered", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "a12a71e6c0c3f09a88c5b857f8e225f6bb35a3f0", + "description": "radv: use shader_info->var_copies_lowered", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "3685528c1ea1fb8b68a421a96a888f2b7ba914f5", + "description": "nir: track if var copies lowering was called", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "27a89a0903f2c541541846e8d909bb67af242d5e", + "description": "loader: unregister special event in loader_dri3_drawable_fini", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "3170b63314f14f0031cb95bd5ee3a4726f26b43b" + }, + { + "sha": "f56f277ba0e4d781be287ea5b2f8a7f15864c643", + "description": "r300: set register file to none if swizzles are constant only", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "1d5d07e56589bf8462f769f45f7561e632f6db57", + "description": "fix: gallivm: limit usage of LLVMContextSetOpaquePointers() to LLVM 15", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "569517d7ad523282490a1119695befcc53779414", + "description": "radv: Use common ycbcr conversion lowering", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "9104dafb6f1753e28a1ac34ebb1b537f840e9946", + "description": "vulkan,nir: Refactor ycbcr conversion state into a struct", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "dae893cb96a7cf851cb8e2f0c8bf187b3ed27f2c", + "description": "radv: Remove radv_indirect_unaligned_dispatch", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "b9d7306edc5effef7eeba2311f4ecaf7d82b0bef", + "description": "radv: Use an ordered dispatch for BVH encoding", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "22a028ea992d0ef037c7ed64f3c1dc69df832c1c", + "description": "radv: Implement ordered compute dispatches", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "77b0a4c025edf0972d88cb3a28f5e2cbbb4bd860", + "description": "radv: Make radv_compute_dispatch non-static", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "26754f658e4f1b4a021447d78b0c8804fe5ca457", + "description": "Revert \"ci: disable Collabora's LAVA lab for maintance\"", + "nominated": false, + "nomination_type": 2, + "resolution": 4, + "main_sha": null, + "because_sha": "60d7e15a7e61c6d51c3fa8e26839793782a12fb4" + }, + { + "sha": "95b5cc3a53b2b7dea00d51d5cb14b8b72440e789", + "description": "radeonsi/ci: Skip slow traces on raven", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "53cc5092885d5d8dd01a66302e2f762f5b00e045", + "description": "radeonsi/ci: Update stoney test expectations", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "f15f08c3de3d0eeca8abf208c8d2ddc0523b3c23", + "description": "intel/dev: Add another EHL pci id", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "a23e04b67367ae90e6fee06e4506bee3f00e6ae6", + "description": "intel/dev: remove invalid EHL pci id", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "89cf0a3bdc9949c54d8d7965a2d51bed91b6d10a", + "description": "zink: fix max acquired image count", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null + }, + { + "sha": "22e91af1a77361249b9c71ee609b67ec187e612c", + "description": "zink: clear null image surfaces to 0", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null + }, + { + "sha": "2fe3cef36754c986a6dcd0a05ec6295c1585d4ac", + "description": "radv: do not insert fast-linked libraries to the shaders cache", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "104040b5c7135403194005951e57197ef76438a6", + "description": "zink: fix leak when rebinding same image surface", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null + }, + { + "sha": "4c647c9e259a6a0fc1499c377a07bfd0ba902079", + "description": "zink: only save frag const buffers when used by blit", + "nominated": true, + "nomination_type": 0, + "resolution": 0, + "main_sha": null, + "because_sha": null + }, + { + "sha": "c68f9ed02084bc10a8f5a39e18975450c225a8b0", + "description": "radv/llvm: use the ring_offsets shader arg", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "be6f30a0db26c918dc89c745101d81466e64ec7a", + "description": "ac/llvm: let ring_offsets be accessed like a normal arg", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "24618721d3946fd69bd28f626cc0d6c543df1806", + "description": "ac: move ring_offsets to ac_shader_args", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "10a5035c836a852fcdc7a4532d9ec1af5fd3464d", + "description": "radv: set state.vbo_misaligned_mask_invalid in radv_bind_vs_input_state", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "c199a5160a08b118df6ba6d3bb211f5e2debcf83" + }, + { + "sha": "21f0fc65b22afec2bbc173a766ce2d68f8515a25", + "description": "pvr: add padding bytes when allocating buffer memory", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "4e75e1bfec35f95543574529ff4f9723712cffc7", + "description": "pvr: Set SPMSCRATCHBUFFER flag.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "ad8c0878b4a6327adf24a2d42bae501b9f99d342", + "description": "pvr: Update comment about ZS and MSAA buffers for pvrsrvkm submission.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "3457f8083a656524ffe7ce572a7d09b0c7279cf3", + "description": "pvr: Acquire scratch buffer on framebuffer creation.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "ad9c61c2925627520b0b54c4b12d6cdcc6ed1839", + "description": "pvr: Add SPM scratch buffer infrastructure.", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "e37f4582078dfcd6a0dd20d6b552222b0f00ecfe", + "description": "intel/ds: track end of pipe bits", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "a242500eb474f0002f64a8fe06b8c5c4cdf9fe79", + "description": "anv: rename a few internal functions to highlight gfx use", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "6a23b187306ffc4ce451a6e2775bc5e44dcc0a9a", + "description": "anv: rename RT pipeline function helper", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "fd7debc8bbb8f6a13f1f0e69c05d5000287a8e2f", + "description": "intel/fs: make alpha_to_coverage a tristate", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "f3969e2413d2ca6c265488ffb91e98ccdd958e89", + "description": "intel/fs: Rework dynamic coarse handling", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "964b87898690064df35c1ef760fdbf297d8ab434", + "description": "intel/fs: Break out yet another FB write helper", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "9c658b1fc86078efe5e71f68519e9216de0f46de", + "description": "intel/fs/validate: Assert SEND [extended] descriptors are uniform", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "949b42c4dc6c829f52576162cbf80e111f02936e", + "description": "intel/compiler: Convert wm_prog_key::multisample_fbo to a tri-state", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "5644011f063f4049bf5ac1b08addba4b138fa912", + "description": "intel/compiler: Convert wm_prog_key::persample_interp to a tri-state", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "d8dfd153c50f24ea50578202832b3eccfb61edf8", + "description": "intel/fs: Make per-sample and coarse dispatch tri-state", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "43ca7f4178a0640308f0364cea8460dffc88a5b0", + "description": "intel/compiler: Convert brw_wm_aa_enable to brw_sometimes", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "5d1c53844907cf12b3533bcf0c821a9481318742", + "description": "intel/fs: Return early in a couple builtin setup helpers", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "714a2916731fad49c29d2484eea96304ee5860a5", + "description": "intel/compiler: Use SHADER_OPCODE_SEND for PI messages", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "9c62e0c77dc7745f2b8fdd86c05def52438a5217", + "description": "nir: Remove nir_lower_io_force_sample_interpolation", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "d25e5310bc1418f4fa3254f911d97cbec0183e45", + "description": "intel/nir: Lower barycentrics to per-sample in a dedicated pass", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "991d54610215786fd4937db24391e7cd5b567919", + "description": "intel/compiler: Document wm_prog_key::persample_interp", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "71a6b53192096904cd9726d9cf86b850d6c1155b", + "description": "amd: don't hardcode real VGPR allocation granularity on gfx10.3 and gfx11", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "e673bb4ae449603470216a05dd81c8bf14dc19d8", + "description": "amd,util: fix how lod bias is converted to fixed-point", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "fb5d31c3dd17af97fc17285a01d77381e638fca1", + "description": "amd/surface: clean up is_dcc_supported_by_L2", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "70d228188a47c0218e40b3fe968f8ca4caded5a9", + "description": "radeonsi: clean up si_set_mutable_tex_desc_fields", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "4f246f27b1f7ef0876a9b2cf6cb641df30ceeba4", + "description": "amd: define new SET_*_REG_PAIRS packets", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "97f30fc65f2e692333a47c0c5de7af9b467c9362", + "description": "radeonsi/gfx11: don't add alpha to mrt0 format for A2C if exporting via mrtz", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "0f81224e70ae8fb875f4ce70bf981e9b00c13dbe", + "description": "radeonsi/gfx11: don't add mrt0 export for alpha-to-coverage if mrtz is present", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "6b97f396e6e268601fac699569c3b249b5cf0970", + "description": "nir/lower_clip: Only emit 1 discard", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "b481e3ae57b1bdd841e95b0dd4a49ac873616998", + "description": "zink: conditionally enable PIPE_CAP_NULL_TEXTURES", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "8b000ebbb5ec9c4ce2362d709516a0b8dedb36c4", + "description": "radeonsi: set PIPE_CAP_NULL_TEXTURES", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "2127287d4dd413c2b5c0b91e44ef15eb2cfa293f", + "description": "gallium: add PIPE_CAP_NULL_TEXTURES", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "7f98fcae52c7925ba8429039742d45e581887627", + "description": "radv: Scalarize global IO with LLVM enabled", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "10ac51a52bad2c2378b2d847eae23e1366ddc46f", + "description": "ac/llvm: Fix validation error with global io", + "nominated": true, + "nomination_type": 1, + "resolution": 0, + "main_sha": null, + "because_sha": "afd645f0576f2cf41b65f360787f01604f00f0f2" + }, + { + "sha": "55175cd13c0c7c0abf034aa82016a7ad1c8b25d5", + "description": "radv/llvm: Use the shader names as module name", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "877e150ec83411cfa6571eed767937b4d9ef299c", + "description": "radv/rq: Use 16 stack entries if there is only one ray query", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, + { + "sha": "4ca4a05627e40e8212a8ea957f8ef2f697e4e322", + "description": "meson: Fix Asahi build on macOS", + "nominated": false, + "nomination_type": null, + "resolution": 4, + "main_sha": null, + "because_sha": null + }, { "sha": "bfa7ec0aa0f317011c4573e4d4ce4d4aabe9bf07", "description": "agx: Don't scalarize preambles in NIR",
