Module: Mesa Branch: staging/22.3 Commit: ac80ae62c6264269bd09026dba90edb5fc8acd11 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=ac80ae62c6264269bd09026dba90edb5fc8acd11
Author: Lionel Landwerlin <[email protected]> Date: Wed Feb 8 14:11:07 2023 +0200 intel/fs: fix mesh indirect movs The size in src[2] is in byte and needs to cover any possible data accessed in src[0] by the indirection. That way the register allocation is aware of what cannot be spilled for the instruction to execute on valid data. Signed-off-by: Lionel Landwerlin <[email protected]> Fixes: 70ace2bbcd ("intel/compiler: Implement Task Output and Mesh Input") Reviewed-by: Marcin Ślusarz <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21188> (cherry picked from commit ebc4893947c187c1a3f28508053633edf7d314a2) --- .pick_status.json | 2 +- src/intel/compiler/brw_mesh.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index ad56afae0b3..7b474ca70d6 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -355,7 +355,7 @@ "description": "intel/fs: fix mesh indirect movs", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "70ace2bbcd5a8b9de1c9bbc2c8bcfe4daed413cd" }, diff --git a/src/intel/compiler/brw_mesh.cpp b/src/intel/compiler/brw_mesh.cpp index cea5aef677d..b1474c04b1e 100644 --- a/src/intel/compiler/brw_mesh.cpp +++ b/src/intel/compiler/brw_mesh.cpp @@ -1146,7 +1146,7 @@ emit_urb_indirect_reads(const fs_builder &bld, nir_intrinsic_instr *instr, retype(quarter(dest_comp, q), BRW_REGISTER_TYPE_UD), data, comp, - brw_imm_ud(4)); + brw_imm_ud(4 * REG_SIZE)); } } }
