Module: Mesa Branch: main Commit: bab235106e73331c70177f32f33040b41154df64 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=bab235106e73331c70177f32f33040b41154df64
Author: Tatsuyuki Ishi <[email protected]> Date: Mon Feb 27 01:38:28 2023 +0900 radv: Replace radv_trap_handler_shader with radv_shader. Now that the upload memory is tied to the shader itself, the trap handler shader no longer needs an additional wrapper. This is a cleanup to ease introduction of a new shader uploading code path. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21541> --- src/amd/vulkan/radv_debug.c | 6 +++--- src/amd/vulkan/radv_private.h | 2 +- src/amd/vulkan/radv_shader.c | 34 ++-------------------------------- src/amd/vulkan/radv_shader.h | 10 +--------- src/amd/vulkan/si_cmd_buffer.c | 4 ++-- 5 files changed, 9 insertions(+), 47 deletions(-) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index a8a0a1cd3ae..d46a2cd591b 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -872,7 +872,7 @@ radv_trap_handler_init(struct radv_device *device) return false; } - result = ws->buffer_make_resident(ws, device->trap_handler_shader->alloc->arena->bo, true); + result = ws->buffer_make_resident(ws, device->trap_handler_shader->bo, true); if (result != VK_SUCCESS) return false; @@ -913,8 +913,8 @@ radv_trap_handler_finish(struct radv_device *device) struct radeon_winsys *ws = device->ws; if (unlikely(device->trap_handler_shader)) { - ws->buffer_make_resident(ws, device->trap_handler_shader->alloc->arena->bo, false); - radv_trap_handler_shader_destroy(device, device->trap_handler_shader); + ws->buffer_make_resident(ws, device->trap_handler_shader->bo, false); + radv_shader_unref(device, device->trap_handler_shader); } if (unlikely(device->tma_bo)) { diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 99d398d9317..738f5b79806 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -989,7 +989,7 @@ struct radv_device { struct radv_rra_trace_data rra_trace; /* Trap handler. */ - struct radv_trap_handler_shader *trap_handler_shader; + struct radv_shader *trap_handler_shader; struct radeon_winsys_bo *tma_bo; /* Trap Memory Address */ uint32_t *tma_ptr; diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c index 426db4dc73e..4fd2895e110 100644 --- a/src/amd/vulkan/radv_shader.c +++ b/src/amd/vulkan/radv_shader.c @@ -2447,7 +2447,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *shader keep_statistic_info, binary_out); } -struct radv_trap_handler_shader * +struct radv_shader * radv_create_trap_handler_shader(struct radv_device *device) { gl_shader_stage stage = MESA_SHADER_COMPUTE; @@ -2455,11 +2455,6 @@ radv_create_trap_handler_shader(struct radv_device *device) struct radv_shader_binary *binary = NULL; struct radv_shader_info info = {0}; struct radv_pipeline_key key = {0}; - struct radv_trap_handler_shader *trap; - - trap = malloc(sizeof(struct radv_trap_handler_shader)); - if (!trap) - return NULL; nir_builder b = radv_meta_init_shader(device, stage, "meta_trap_handler"); @@ -2473,35 +2468,10 @@ radv_create_trap_handler_shader(struct radv_device *device) shader = shader_compile(device, &b.shader, 1, stage, &info, &args, &key, true, false, false, &binary); - - trap->alloc = radv_alloc_shader_memory(device, shader->code_size, NULL); - - trap->bo = trap->alloc->arena->bo; - char *dest_ptr = trap->alloc->arena->ptr + trap->alloc->offset; - - struct radv_shader_binary_legacy *bin = (struct radv_shader_binary_legacy *)binary; - memcpy(dest_ptr, bin->data, bin->code_size); - ralloc_free(b.shader); - free(shader); free(binary); - return trap; -} - -uint64_t radv_trap_handler_shader_get_va(const struct radv_trap_handler_shader *trap) -{ - return radv_buffer_get_va(trap->alloc->arena->bo) + trap->alloc->offset; -} - -void -radv_trap_handler_shader_destroy(struct radv_device *device, struct radv_trap_handler_shader *trap) -{ - if (!trap) - return; - - radv_free_shader_memory(device, trap->alloc); - free(trap); + return shader; } static void radv_aco_build_shader_part(void **bin, diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h index cc074438fb2..dee8a42ab7e 100644 --- a/src/amd/vulkan/radv_shader.h +++ b/src/amd/vulkan/radv_shader.h @@ -508,11 +508,6 @@ struct radv_shader { uint32_t *statistics; }; -struct radv_trap_handler_shader { - struct radeon_winsys_bo *bo; - union radv_shader_arena_block *alloc; -}; - struct radv_shader_part { uint32_t ref_count; @@ -596,10 +591,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct nir_shader *nir, bool keep_shader_info, bool keep_statistic_info, bool disable_optimizations); -struct radv_trap_handler_shader *radv_create_trap_handler_shader(struct radv_device *device); -uint64_t radv_trap_handler_shader_get_va(const struct radv_trap_handler_shader *trap); -void radv_trap_handler_shader_destroy(struct radv_device *device, - struct radv_trap_handler_shader *trap); +struct radv_shader *radv_create_trap_handler_shader(struct radv_device *device); struct radv_shader_part *radv_create_vs_prolog(struct radv_device *device, const struct radv_vs_prolog_key *key); diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 19486f6e0fb..ff5443b43d1 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -141,7 +141,7 @@ si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs) assert(device->physical_device->rad_info.gfx_level == GFX8); - tba_va = radv_trap_handler_shader_get_va(device->trap_handler_shader); + tba_va = radv_shader_get_va(device->trap_handler_shader); tma_va = radv_buffer_get_va(device->tma_bo); radeon_set_sh_reg_seq(cs, R_00B838_COMPUTE_TBA_LO, 4); @@ -604,7 +604,7 @@ si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs) assert(device->physical_device->rad_info.gfx_level == GFX8); - tba_va = radv_trap_handler_shader_get_va(device->trap_handler_shader); + tba_va = radv_shader_get_va(device->trap_handler_shader); tma_va = radv_buffer_get_va(device->tma_bo); uint32_t regs[] = {R_00B000_SPI_SHADER_TBA_LO_PS, R_00B100_SPI_SHADER_TBA_LO_VS,
