Module: Mesa Branch: main Commit: 3a043b57399ee4dcfb99eaedea76684067b5653e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3a043b57399ee4dcfb99eaedea76684067b5653e
Author: Marek Olšák <[email protected]> Date: Fri Apr 28 00:11:32 2023 -0400 aco: don't treat ACCESS_NON_READABLE as ACCESS_COHERENT ... and expect it to behave like ACCESS_NON_TEMPORAL. Handling ACCESS_NON_TEMPORAL is sufficient. This was copied from ac_nir_to_llvm.c. Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Reviewed-by: Timur Kristóf <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22770> --- src/amd/compiler/aco_instruction_selection.cpp | 6 +++--- src/amd/compiler/tests/test_isel.cpp | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index 252b754c7dc..7298e9b5ec9 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -6290,7 +6290,7 @@ visit_image_store(isel_context* ctx, nir_intrinsic_instr* instr) memory_sync_info sync = get_memory_sync_info(instr, storage_image, 0); unsigned access = nir_intrinsic_access(instr); bool glc = ctx->options->gfx_level == GFX6 || - ((access & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE)) && + ((access & (ACCESS_VOLATILE | ACCESS_COHERENT)) && ctx->program->gfx_level < GFX11); if (dim == GLSL_SAMPLER_DIM_BUF) { @@ -6581,7 +6581,7 @@ visit_store_ssbo(isel_context* ctx, nir_intrinsic_instr* instr) memory_sync_info sync = get_memory_sync_info(instr, storage_buffer, 0); bool glc = - (nir_intrinsic_access(instr) & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE)) && + (nir_intrinsic_access(instr) & (ACCESS_VOLATILE | ACCESS_COHERENT)) && ctx->program->gfx_level < GFX11; unsigned write_count = 0; @@ -6735,7 +6735,7 @@ visit_store_global(isel_context* ctx, nir_intrinsic_instr* instr) Temp data = as_vgpr(ctx, get_ssa_temp(ctx, instr->src[0].ssa)); memory_sync_info sync = get_memory_sync_info(instr, storage_buffer, 0); bool glc = - (nir_intrinsic_access(instr) & (ACCESS_VOLATILE | ACCESS_COHERENT | ACCESS_NON_READABLE)) && + (nir_intrinsic_access(instr) & (ACCESS_VOLATILE | ACCESS_COHERENT)) && ctx->program->gfx_level < GFX11; unsigned write_count = 0; diff --git a/src/amd/compiler/tests/test_isel.cpp b/src/amd/compiler/tests/test_isel.cpp index 01593155210..970076b3093 100644 --- a/src/amd/compiler/tests/test_isel.cpp +++ b/src/amd/compiler/tests/test_isel.cpp @@ -70,7 +70,7 @@ BEGIN_TEST(isel.compute.simple) }; void main() { //>> v1: %data = p_parallelcopy 42 - //! buffer_store_dword (kill)%_, v1: undef, 0, (kill)%data glc disable_wqm storage:buffer + //! buffer_store_dword (kill)%_, v1: undef, 0, (kill)%data disable_wqm storage:buffer res = 42; } );
