Module: Mesa Branch: main Commit: 4621a6db5084c4bdaef57900d4306bd4e4bcda3a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=4621a6db5084c4bdaef57900d4306bd4e4bcda3a
Author: Jesse Natalie <[email protected]> Date: Fri May 12 09:14:06 2023 -0700 dxil: Use unified atomics Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22993> --- src/compiler/nir/nir_intrinsics.py | 22 +-- src/microsoft/compiler/dxil_module.c | 14 +- src/microsoft/compiler/dxil_nir.c | 36 ++-- .../compiler/dxil_nir_lower_int_cubemaps.c | 34 +--- src/microsoft/compiler/nir_to_dxil.c | 184 +++++++++------------ src/microsoft/spirv_to_dxil/dxil_spirv_nir.c | 5 +- .../spirv_to_dxil/dxil_spirv_nir_lower_bindless.c | 17 +- 7 files changed, 102 insertions(+), 210 deletions(-) diff --git a/src/compiler/nir/nir_intrinsics.py b/src/compiler/nir/nir_intrinsics.py index b4938d6937a..6a222f80106 100644 --- a/src/compiler/nir/nir_intrinsics.py +++ b/src/compiler/nir/nir_intrinsics.py @@ -1289,25 +1289,9 @@ load("ubo_dxil", [1, 1], [], [CAN_ELIMINATE, CAN_REORDER]) # DXIL Shared atomic intrinsics # -# All of the shared variable atomic memory operations read a value from -# memory, compute a new value using one of the operations below, write the -# new value to memory, and return the original value read. -# -# All operations take 2 sources: -# -# 0: The index in the i32 array for by the shared memory region -# 1: The data parameter to the atomic function (i.e. the value to add -# in shared_atomic_add, etc). -intrinsic("shared_atomic_add_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_imin_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_umin_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_imax_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_umax_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_and_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_or_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_xor_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_exchange_dxil", src_comp=[1, 1], dest_comp=1) -intrinsic("shared_atomic_comp_swap_dxil", src_comp=[1, 1, 1], dest_comp=1) +# src0 is the index in the i32 array for by the shared memory region +intrinsic("shared_atomic_dxil", src_comp=[1, 1], dest_comp=1, indices=[ATOMIC_OP]) +intrinsic("shared_atomic_swap_dxil", src_comp=[1, 1, 1], dest_comp=1, indices=[ATOMIC_OP]) # Intrinsics used by the Midgard/Bifrost blend pipeline. These are defined # within a blend shader to read/write the raw value from the tile buffer, diff --git a/src/microsoft/compiler/dxil_module.c b/src/microsoft/compiler/dxil_module.c index 773e5640a6f..2fba8b0ee0e 100644 --- a/src/microsoft/compiler/dxil_module.c +++ b/src/microsoft/compiler/dxil_module.c @@ -2096,18 +2096,10 @@ alu_type_from_image_intr(nir_intrinsic_instr *intr) case nir_intrinsic_image_deref_store: case nir_intrinsic_bindless_image_store: return nir_intrinsic_src_type(intr); - case nir_intrinsic_image_atomic_fadd: - case nir_intrinsic_image_atomic_fmax: - case nir_intrinsic_image_atomic_fmin: - case nir_intrinsic_image_deref_atomic_fadd: - case nir_intrinsic_image_deref_atomic_fmax: - case nir_intrinsic_image_deref_atomic_fmin: - case nir_intrinsic_bindless_image_atomic_fadd: - case nir_intrinsic_bindless_image_atomic_fmax: - case nir_intrinsic_bindless_image_atomic_fmin: - return nir_type_float; default: - return nir_type_int; + if (nir_intrinsic_has_atomic_op(intr)) + return nir_atomic_op_type(nir_intrinsic_atomic_op(intr)); + return nir_type_uint; } } diff --git a/src/microsoft/compiler/dxil_nir.c b/src/microsoft/compiler/dxil_nir.c index 370889fab43..5961b31131b 100644 --- a/src/microsoft/compiler/dxil_nir.c +++ b/src/microsoft/compiler/dxil_nir.c @@ -758,8 +758,7 @@ dxil_nir_lower_loads_stores_to_dxil(nir_shader *nir, } static bool -lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr, - nir_intrinsic_op dxil_op) +lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr) { b->cursor = nir_before_instr(&intr->instr); @@ -768,16 +767,19 @@ lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr, nir_iadd(b, intr->src[0].ssa, nir_imm_int(b, nir_intrinsic_base(intr))); nir_ssa_def *index = nir_ushr(b, offset, nir_imm_int(b, 2)); + nir_intrinsic_op dxil_op = intr->intrinsic == nir_intrinsic_shared_atomic_swap ? + nir_intrinsic_shared_atomic_swap_dxil : nir_intrinsic_shared_atomic_dxil; nir_intrinsic_instr *atomic = nir_intrinsic_instr_create(b->shader, dxil_op); atomic->src[0] = nir_src_for_ssa(index); assert(intr->src[1].is_ssa); atomic->src[1] = nir_src_for_ssa(intr->src[1].ssa); - if (dxil_op == nir_intrinsic_shared_atomic_comp_swap_dxil) { + if (dxil_op == nir_intrinsic_shared_atomic_swap_dxil) { assert(intr->src[2].is_ssa); atomic->src[2] = nir_src_for_ssa(intr->src[2].ssa); } atomic->num_components = 0; nir_ssa_dest_init(&atomic->instr, &atomic->dest, 1, 32, NULL); + nir_intrinsic_set_atomic_op(atomic, nir_intrinsic_atomic_op(intr)); nir_builder_instr_insert(b, &atomic->instr); nir_ssa_def_rewrite_uses(&intr->dest.ssa, &atomic->dest.ssa); @@ -788,7 +790,7 @@ lower_shared_atomic(nir_builder *b, nir_intrinsic_instr *intr, bool dxil_nir_lower_atomics_to_dxil(nir_shader *nir) { - bool progress = false; + bool progress = nir_lower_legacy_atomics(nir); foreach_list_typed(nir_function, func, node, &nir->functions) { if (!func->is_entrypoint) @@ -805,25 +807,10 @@ dxil_nir_lower_atomics_to_dxil(nir_shader *nir) nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); switch (intr->intrinsic) { - -#define ATOMIC(op) \ - case nir_intrinsic_shared_atomic_##op: \ - progress |= lower_shared_atomic(&b, intr, \ - nir_intrinsic_shared_atomic_##op##_dxil); \ - break - - ATOMIC(add); - ATOMIC(imin); - ATOMIC(umin); - ATOMIC(imax); - ATOMIC(umax); - ATOMIC(and); - ATOMIC(or); - ATOMIC(xor); - ATOMIC(exchange); - ATOMIC(comp_swap); - -#undef ATOMIC + case nir_intrinsic_shared_atomic: + case nir_intrinsic_shared_atomic_swap: + progress |= lower_shared_atomic(&b, intr); + break; default: break; } @@ -2088,7 +2075,8 @@ lower_subgroup_id(nir_builder *b, nir_instr *instr, void *data) .memory_modes = nir_var_mem_shared); nif = nir_push_if(b, nir_elect(b, 1)); - nir_ssa_def *subgroup_id_first_thread = nir_deref_atomic_add(b, 32, &counter_deref->dest.ssa, nir_imm_int(b, 1)); + nir_ssa_def *subgroup_id_first_thread = nir_deref_atomic(b, 32, &counter_deref->dest.ssa, nir_imm_int(b, 1), + .atomic_op = nir_atomic_op_iadd); nir_store_var(b, subgroup_id_local, subgroup_id_first_thread, 1); nir_pop_if(b, nif); diff --git a/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c b/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c index 46c719bf392..6fd1de1a03b 100644 --- a/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c +++ b/src/microsoft/compiler/dxil_nir_lower_int_cubemaps.c @@ -47,39 +47,13 @@ lower_int_cubmap_to_array_filter(const nir_instr *instr, if (instr->type == nir_instr_type_intrinsic) { nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr); switch (intr->intrinsic) { - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_image_atomic_comp_swap: - case nir_intrinsic_image_atomic_dec_wrap: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_image_atomic_fadd: - case nir_intrinsic_image_atomic_fmax: - case nir_intrinsic_image_atomic_fmin: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_image_atomic_inc_wrap: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_image_atomic_xor: + case nir_intrinsic_image_atomic: + case nir_intrinsic_image_atomic_swap: case nir_intrinsic_image_load: case nir_intrinsic_image_size: case nir_intrinsic_image_store: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_dec_wrap: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_fadd: - case nir_intrinsic_image_deref_atomic_fmax: - case nir_intrinsic_image_deref_atomic_fmin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_inc_wrap: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_xor: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_size: case nir_intrinsic_image_deref_store: diff --git a/src/microsoft/compiler/nir_to_dxil.c b/src/microsoft/compiler/nir_to_dxil.c index 02c7b5e1e35..136e0889c7d 100644 --- a/src/microsoft/compiler/nir_to_dxil.c +++ b/src/microsoft/compiler/nir_to_dxil.c @@ -400,6 +400,40 @@ enum dxil_atomic_op { DXIL_ATOMIC_EXCHANGE = 8, }; +static enum dxil_atomic_op +nir_atomic_to_dxil_atomic(nir_atomic_op op) +{ + switch (op) { + case nir_atomic_op_iadd: return DXIL_ATOMIC_ADD; + case nir_atomic_op_iand: return DXIL_ATOMIC_AND; + case nir_atomic_op_ior: return DXIL_ATOMIC_OR; + case nir_atomic_op_ixor: return DXIL_ATOMIC_XOR; + case nir_atomic_op_imin: return DXIL_ATOMIC_IMIN; + case nir_atomic_op_imax: return DXIL_ATOMIC_IMAX; + case nir_atomic_op_umin: return DXIL_ATOMIC_UMIN; + case nir_atomic_op_umax: return DXIL_ATOMIC_UMAX; + case nir_atomic_op_xchg: return DXIL_ATOMIC_EXCHANGE; + default: unreachable("Unsupported atomic op"); + } +} + +static enum dxil_rmw_op +nir_atomic_to_dxil_rmw(nir_atomic_op op) +{ + switch (op) { + case nir_atomic_op_iadd: return DXIL_RMWOP_ADD; + case nir_atomic_op_iand: return DXIL_RMWOP_AND; + case nir_atomic_op_ior: return DXIL_RMWOP_OR; + case nir_atomic_op_ixor: return DXIL_RMWOP_XOR; + case nir_atomic_op_imin: return DXIL_RMWOP_MIN; + case nir_atomic_op_imax: return DXIL_RMWOP_MAX; + case nir_atomic_op_umin: return DXIL_RMWOP_UMIN; + case nir_atomic_op_umax: return DXIL_RMWOP_UMAX; + case nir_atomic_op_xchg: return DXIL_RMWOP_XCHG; + default: unreachable("Unsupported atomic op"); + } +} + typedef struct { unsigned id; unsigned binding; @@ -4276,20 +4310,17 @@ emit_image_load(struct ntd_context *ctx, nir_intrinsic_instr *intr) } static bool -emit_image_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, - enum dxil_atomic_op op) +emit_image_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr) { - nir_deref_instr *src_as_deref = nir_src_as_deref(intr->src[0]); - bool is_bindless = !src_as_deref && !nir_intrinsic_has_range_base(intr); - const struct dxil_value *handle = is_bindless ? + const struct dxil_value *handle = intr->intrinsic == nir_intrinsic_bindless_image_atomic ? create_image_handle(ctx, intr) : get_resource_handle(ctx, &intr->src[0], DXIL_RESOURCE_CLASS_UAV, DXIL_RESOURCE_KIND_TEXTURE2D); if (!handle) return false; bool is_array = false; - if (src_as_deref) - is_array = glsl_sampler_type_is_array(src_as_deref->type); + if (intr->intrinsic == nir_intrinsic_image_deref_atomic) + is_array = glsl_sampler_type_is_array(nir_src_as_deref(intr->src[0])->type); else is_array = nir_intrinsic_image_array(intr); @@ -4298,8 +4329,8 @@ emit_image_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, return false; const struct dxil_value *coord[3] = { int32_undef, int32_undef, int32_undef }; - enum glsl_sampler_dim image_dim = src_as_deref ? - glsl_get_sampler_dim(src_as_deref->type) : + enum glsl_sampler_dim image_dim = intr->intrinsic == nir_intrinsic_image_deref_atomic ? + glsl_get_sampler_dim(nir_src_as_deref(intr->src[0])->type) : nir_intrinsic_image_dim(intr); unsigned num_coords = glsl_get_sampler_dim_coordinate_components(image_dim); if (is_array) @@ -4312,12 +4343,15 @@ emit_image_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, return false; } - const struct dxil_value *value = get_src(ctx, &intr->src[3], 0, nir_type_uint); + nir_atomic_op nir_op = nir_intrinsic_atomic_op(intr); + enum dxil_atomic_op dxil_op = nir_atomic_to_dxil_atomic(nir_op); + nir_alu_type type = nir_atomic_op_type(nir_op); + const struct dxil_value *value = get_src(ctx, &intr->src[3], 0, type); if (!value) return false; const struct dxil_value *retval = - emit_atomic_binop(ctx, handle, op, coord, value); + emit_atomic_binop(ctx, handle, dxil_op, coord, value); if (!retval) return false; @@ -4329,14 +4363,14 @@ emit_image_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, static bool emit_image_atomic_comp_swap(struct ntd_context *ctx, nir_intrinsic_instr *intr) { - const struct dxil_value *handle = intr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap ? + const struct dxil_value *handle = intr->intrinsic == nir_intrinsic_bindless_image_atomic_swap ? create_image_handle(ctx, intr) : get_resource_handle(ctx, &intr->src[0], DXIL_RESOURCE_CLASS_UAV, DXIL_RESOURCE_KIND_TEXTURE2D); if (!handle) return false; bool is_array = false; - if (intr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap) + if (intr->intrinsic == nir_intrinsic_image_deref_atomic_swap) is_array = glsl_sampler_type_is_array(nir_src_as_deref(intr->src[0])->type); else is_array = nir_intrinsic_image_array(intr); @@ -4346,7 +4380,7 @@ emit_image_atomic_comp_swap(struct ntd_context *ctx, nir_intrinsic_instr *intr) return false; const struct dxil_value *coord[3] = { int32_undef, int32_undef, int32_undef }; - enum glsl_sampler_dim image_dim = intr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ? + enum glsl_sampler_dim image_dim = intr->intrinsic == nir_intrinsic_image_deref_atomic_swap ? glsl_get_sampler_dim(nir_src_as_deref(intr->src[0])->type) : nir_intrinsic_image_dim(intr); unsigned num_coords = glsl_get_sampler_dim_coordinate_components(image_dim); @@ -4465,14 +4499,16 @@ emit_get_ssbo_size(struct ntd_context *ctx, nir_intrinsic_instr *intr) } static bool -emit_ssbo_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, - enum dxil_atomic_op op) +emit_ssbo_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr) { + nir_atomic_op nir_op = nir_intrinsic_atomic_op(intr); + enum dxil_atomic_op dxil_op = nir_atomic_to_dxil_atomic(nir_op); + nir_alu_type type = nir_atomic_op_type(nir_op); const struct dxil_value* handle = get_resource_handle(ctx, &intr->src[0], DXIL_RESOURCE_CLASS_UAV, DXIL_RESOURCE_KIND_RAW_BUFFER); const struct dxil_value *offset = get_src(ctx, &intr->src[1], 0, nir_type_uint); const struct dxil_value *value = - get_src(ctx, &intr->src[2], 0, nir_type_uint); + get_src(ctx, &intr->src[2], 0, type); if (!value || !handle || !offset) return false; @@ -4486,7 +4522,7 @@ emit_ssbo_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, }; const struct dxil_value *retval = - emit_atomic_binop(ctx, handle, op, coord, value); + emit_atomic_binop(ctx, handle, dxil_op, coord, value); if (!retval) return false; @@ -4528,8 +4564,7 @@ emit_ssbo_atomic_comp_swap(struct ntd_context *ctx, nir_intrinsic_instr *intr) } static bool -emit_shared_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, - enum dxil_rmw_op op) +emit_shared_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr) { const struct dxil_value *zero, *index; @@ -4550,11 +4585,14 @@ emit_shared_atomic(struct ntd_context *ctx, nir_intrinsic_instr *intr, if (!ptr) return false; - value = get_src(ctx, &intr->src[1], 0, nir_type_uint); + nir_atomic_op nir_op = nir_intrinsic_atomic_op(intr); + enum dxil_rmw_op dxil_op = nir_atomic_to_dxil_rmw(nir_op); + nir_alu_type type = nir_atomic_op_type(nir_op); + value = get_src(ctx, &intr->src[1], 0, type); if (!value) return false; - retval = dxil_emit_atomicrmw(&ctx->mod, value, ptr, op, false, + retval = dxil_emit_atomicrmw(&ctx->mod, value, ptr, dxil_op, false, DXIL_ATOMIC_ORDERING_ACQREL, DXIL_SYNC_SCOPE_CROSSTHREAD); if (!retval) @@ -5033,85 +5071,21 @@ emit_intrinsic(struct ntd_context *ctx, nir_intrinsic_instr *intr) return emit_group_memory_barrier(ctx, intr); case nir_intrinsic_control_barrier: return emit_control_barrier(ctx, intr); - case nir_intrinsic_ssbo_atomic_add: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_ADD); - case nir_intrinsic_ssbo_atomic_imin: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_IMIN); - case nir_intrinsic_ssbo_atomic_umin: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_UMIN); - case nir_intrinsic_ssbo_atomic_imax: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_IMAX); - case nir_intrinsic_ssbo_atomic_umax: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_UMAX); - case nir_intrinsic_ssbo_atomic_and: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_AND); - case nir_intrinsic_ssbo_atomic_or: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_OR); - case nir_intrinsic_ssbo_atomic_xor: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_XOR); - case nir_intrinsic_ssbo_atomic_exchange: - return emit_ssbo_atomic(ctx, intr, DXIL_ATOMIC_EXCHANGE); - case nir_intrinsic_ssbo_atomic_comp_swap: + case nir_intrinsic_ssbo_atomic: + return emit_ssbo_atomic(ctx, intr); + case nir_intrinsic_ssbo_atomic_swap: return emit_ssbo_atomic_comp_swap(ctx, intr); - case nir_intrinsic_shared_atomic_add_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_ADD); - case nir_intrinsic_shared_atomic_imin_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_MIN); - case nir_intrinsic_shared_atomic_umin_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_UMIN); - case nir_intrinsic_shared_atomic_imax_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_MAX); - case nir_intrinsic_shared_atomic_umax_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_UMAX); - case nir_intrinsic_shared_atomic_and_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_AND); - case nir_intrinsic_shared_atomic_or_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_OR); - case nir_intrinsic_shared_atomic_xor_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_XOR); - case nir_intrinsic_shared_atomic_exchange_dxil: - return emit_shared_atomic(ctx, intr, DXIL_RMWOP_XCHG); - case nir_intrinsic_shared_atomic_comp_swap_dxil: + case nir_intrinsic_shared_atomic_dxil: + return emit_shared_atomic(ctx, intr); + case nir_intrinsic_shared_atomic_swap_dxil: return emit_shared_atomic_comp_swap(ctx, intr); - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_atomic_add: - case nir_intrinsic_bindless_image_atomic_add: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_ADD); - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_atomic_imin: - case nir_intrinsic_bindless_image_atomic_imin: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_IMIN); - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_atomic_umin: - case nir_intrinsic_bindless_image_atomic_umin: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_UMIN); - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_atomic_imax: - case nir_intrinsic_bindless_image_atomic_imax: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_IMAX); - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_atomic_umax: - case nir_intrinsic_bindless_image_atomic_umax: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_UMAX); - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_atomic_and: - case nir_intrinsic_bindless_image_atomic_and: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_AND); - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_atomic_or: - case nir_intrinsic_bindless_image_atomic_or: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_OR); - case nir_intrinsic_image_deref_atomic_xor: - case nir_intrinsic_image_atomic_xor: - case nir_intrinsic_bindless_image_atomic_xor: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_XOR); - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_atomic_exchange: - case nir_intrinsic_bindless_image_atomic_exchange: - return emit_image_atomic(ctx, intr, DXIL_ATOMIC_EXCHANGE); - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_atomic_comp_swap: - case nir_intrinsic_bindless_image_atomic_comp_swap: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_atomic: + case nir_intrinsic_bindless_image_atomic: + return emit_image_atomic(ctx, intr); + case nir_intrinsic_image_deref_atomic_swap: + case nir_intrinsic_image_atomic_swap: + case nir_intrinsic_bindless_image_atomic_swap: return emit_image_atomic_comp_swap(ctx, intr); case nir_intrinsic_image_store: case nir_intrinsic_image_deref_store: @@ -6256,16 +6230,8 @@ shader_has_shared_ops(struct nir_shader *s) switch (intrin->intrinsic) { case nir_intrinsic_load_shared_dxil: case nir_intrinsic_store_shared_dxil: - case nir_intrinsic_shared_atomic_add_dxil: - case nir_intrinsic_shared_atomic_and_dxil: - case nir_intrinsic_shared_atomic_comp_swap_dxil: - case nir_intrinsic_shared_atomic_exchange_dxil: - case nir_intrinsic_shared_atomic_imax_dxil: - case nir_intrinsic_shared_atomic_imin_dxil: - case nir_intrinsic_shared_atomic_or_dxil: - case nir_intrinsic_shared_atomic_umax_dxil: - case nir_intrinsic_shared_atomic_umin_dxil: - case nir_intrinsic_shared_atomic_xor_dxil: + case nir_intrinsic_shared_atomic_dxil: + case nir_intrinsic_shared_atomic_swap_dxil: return true; default: break; } diff --git a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c index 1d453fa8cf9..6df633816f9 100644 --- a/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c +++ b/src/microsoft/spirv_to_dxil/dxil_spirv_nir.c @@ -947,7 +947,6 @@ dxil_spirv_nir_passes(nir_shader *nir, { glsl_type_singleton_init_or_ref(); - NIR_PASS_V(nir, dxil_nir_lower_int_cubemaps, false); NIR_PASS_V(nir, nir_lower_io_to_vector, nir_var_shader_out | (nir->info.stage != MESA_SHADER_VERTEX ? nir_var_shader_in : 0)); @@ -1075,6 +1074,9 @@ dxil_spirv_nir_passes(nir_shader *nir, NIR_PASS_V(nir, nir_lower_explicit_io, nir_var_mem_shared, nir_address_format_32bit_offset); + NIR_PASS_V(nir, dxil_nir_lower_atomics_to_dxil); + NIR_PASS_V(nir, dxil_nir_lower_int_cubemaps, false); + NIR_PASS_V(nir, nir_lower_clip_cull_distance_arrays); NIR_PASS_V(nir, nir_lower_io_to_temporaries, nir_shader_get_entrypoint(nir), true, true); NIR_PASS_V(nir, nir_lower_global_vars_to_local); @@ -1140,7 +1142,6 @@ dxil_spirv_nir_passes(nir_shader *nir, }; NIR_PASS_V(nir, nir_lower_tex, &lower_tex_options); - NIR_PASS_V(nir, dxil_nir_lower_atomics_to_dxil); NIR_PASS_V(nir, dxil_nir_split_clip_cull_distance); const struct dxil_nir_lower_loads_stores_options loads_stores_options = { .use_16bit_ssbo = conf->shader_model_max >= SHADER_MODEL_6_2, diff --git a/src/microsoft/spirv_to_dxil/dxil_spirv_nir_lower_bindless.c b/src/microsoft/spirv_to_dxil/dxil_spirv_nir_lower_bindless.c index 6dda9849e2b..856128eac65 100644 --- a/src/microsoft/spirv_to_dxil/dxil_spirv_nir_lower_bindless.c +++ b/src/microsoft/spirv_to_dxil/dxil_spirv_nir_lower_bindless.c @@ -169,21 +169,8 @@ lower_bindless_instr(nir_builder *b, nir_instr *instr, void *data) case nir_intrinsic_image_deref_load: case nir_intrinsic_image_deref_store: case nir_intrinsic_image_deref_size: - case nir_intrinsic_image_deref_atomic_add: - case nir_intrinsic_image_deref_atomic_and: - case nir_intrinsic_image_deref_atomic_comp_swap: - case nir_intrinsic_image_deref_atomic_dec_wrap: - case nir_intrinsic_image_deref_atomic_exchange: - case nir_intrinsic_image_deref_atomic_fadd: - case nir_intrinsic_image_deref_atomic_fmax: - case nir_intrinsic_image_deref_atomic_fmin: - case nir_intrinsic_image_deref_atomic_imax: - case nir_intrinsic_image_deref_atomic_imin: - case nir_intrinsic_image_deref_atomic_inc_wrap: - case nir_intrinsic_image_deref_atomic_or: - case nir_intrinsic_image_deref_atomic_umax: - case nir_intrinsic_image_deref_atomic_umin: - case nir_intrinsic_image_deref_atomic_xor: + case nir_intrinsic_image_deref_atomic: + case nir_intrinsic_image_deref_atomic_swap: return lower_bindless_image_intr(b, intr, options); case nir_intrinsic_vulkan_resource_index: return lower_vulkan_resource_index(b, intr, options);
