Module: Mesa Branch: main Commit: 96b97ed527108c85b94ba9245ede38b691a1eaa0 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=96b97ed527108c85b94ba9245ede38b691a1eaa0
Author: Samuel Pitoiset <[email protected]> Date: Wed Jul 19 08:47:49 2023 +0200 radv: declare the shader query user SGPR for emulating GS counters This user SGPR is only declared on chips that support NGG but might fallback to legacy GS for some reasons, like XFB. It will be used to emulate GS counters from shaders. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24231> --- src/amd/vulkan/radv_cmd_buffer.c | 2 +- src/amd/vulkan/radv_shader_args.c | 11 +++++------ src/amd/vulkan/radv_shader_info.c | 6 ++++-- 3 files changed, 10 insertions(+), 9 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 44370280f40..91abc4c23b5 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -5047,7 +5047,7 @@ radv_flush_shader_query_state(struct radv_cmd_buffer *cmd_buffer) if (loc->sgpr_idx == -1) return; - assert(last_vgt_shader->info.is_ngg); + assert(last_vgt_shader->info.is_ngg || last_vgt_shader->info.stage == MESA_SHADER_GEOMETRY); /* By default shader queries are disabled but they are enabled if the command buffer has active GDS * queries or if it's a secondary command buffer that inherits the number of generated diff --git a/src/amd/vulkan/radv_shader_args.c b/src/amd/vulkan/radv_shader_args.c index dceaba42f7f..3816f74bfb4 100644 --- a/src/amd/vulkan/radv_shader_args.c +++ b/src/amd/vulkan/radv_shader_args.c @@ -286,12 +286,8 @@ declare_ps_input_vgprs(const struct radv_shader_info *info, struct radv_shader_a } static void -declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, bool has_shader_query, - bool has_ngg_provoking_vtx) +declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, bool has_ngg_provoking_vtx) { - if (has_shader_query) - add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE); - if (has_ngg_provoking_vtx) add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_provoking_vtx, AC_UD_NGG_PROVOKING_VTX); @@ -613,8 +609,11 @@ declare_shader_args(const struct radv_device *device, const struct radv_pipeline add_ud_arg(args, 1, AC_ARG_INT, &args->ac.force_vrs_rates, AC_UD_FORCE_VRS_RATES); } + if (has_shader_query) + add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE); + if (info->is_ngg) { - declare_ngg_sgprs(info, args, has_shader_query, has_ngg_provoking_vtx); + declare_ngg_sgprs(info, args, has_ngg_provoking_vtx); } ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]); diff --git a/src/amd/vulkan/radv_shader_info.c b/src/amd/vulkan/radv_shader_info.c index 6aa44879666..d2416f56386 100644 --- a/src/amd/vulkan/radv_shader_info.c +++ b/src/amd/vulkan/radv_shader_info.c @@ -494,7 +494,7 @@ gather_shader_info_tes(struct radv_device *device, const nir_shader *nir, struct } static void -gather_shader_info_gs(const nir_shader *nir, struct radv_shader_info *info) +gather_shader_info_gs(struct radv_device *device, const nir_shader *nir, struct radv_shader_info *info) { unsigned add_clip = nir->info.clip_distance_array_size + nir->info.cull_distance_array_size > 4; info->gs.gsvs_vertex_size = (util_bitcount64(nir->info.outputs_written) + add_clip) * 16; @@ -515,6 +515,8 @@ gather_shader_info_gs(const nir_shader *nir, struct radv_shader_info *info) info->gs.num_stream_output_components[stream] += num_components; } + + info->gs.has_pipeline_stat_query = device->physical_device->emulate_ngg_gs_query_pipeline_stat; } static void @@ -982,7 +984,7 @@ radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *n gather_shader_info_fs(device, nir, pipeline_key, info); break; case MESA_SHADER_GEOMETRY: - gather_shader_info_gs(nir, info); + gather_shader_info_gs(device, nir, info); break; case MESA_SHADER_TESS_EVAL: gather_shader_info_tes(device, nir, info);
