Module: Mesa Branch: main Commit: 9880224490c20cae432d5bfe7454af6aa1aa312a URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=9880224490c20cae432d5bfe7454af6aa1aa312a
Author: Samuel Pitoiset <[email protected]> Date: Fri Aug 4 17:59:24 2023 +0200 radv: use the RT prolog scratch size directly for tracing rays It should be the same as the pipeline scratch size value. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24502> --- src/amd/vulkan/radv_cmd_buffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 0a05fca05c9..6397985c17e 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -9826,7 +9826,7 @@ radv_trace_rays(struct radv_cmd_buffer *cmd_buffer, const VkTraceRaysIndirectCom uint32_t base_reg = rt_prolog->info.user_data_0; /* Reserve scratch for stacks manually since it is not handled by the compute path. */ - uint32_t scratch_bytes_per_wave = pipeline->base.scratch_bytes_per_wave; + uint32_t scratch_bytes_per_wave = rt_prolog->config.scratch_bytes_per_wave; uint32_t wave_size = rt_prolog->info.wave_size; /* The hardware register is specified as a multiple of 64 or 256 DWORDS. */ @@ -9884,7 +9884,7 @@ radv_trace_rays(struct radv_cmd_buffer *cmd_buffer, const VkTraceRaysIndirectCom if (base_loc->sgpr_idx != -1) { const struct radv_shader_info *cs_info = &rt_prolog->info; radeon_set_sh_reg(cmd_buffer->cs, R_00B900_COMPUTE_USER_DATA_0 + base_loc->sgpr_idx * 4, - pipeline->base.scratch_bytes_per_wave / cs_info->wave_size); + rt_prolog->config.scratch_bytes_per_wave / cs_info->wave_size); } const struct radv_userdata_info *shader_loc = radv_get_user_sgpr(rt_prolog, AC_UD_CS_TRAVERSAL_SHADER_ADDR);
