Module: Mesa
Branch: main
Commit: 486e7bdbd853a121e0f25f2cdec17e4b5ae25ed7
URL:    
http://cgit.freedesktop.org/mesa/mesa/commit/?id=486e7bdbd853a121e0f25f2cdec17e4b5ae25ed7

Author: Jordan Justen <[email protected]>
Date:   Fri Aug  4 11:37:21 2023 -0700

anvil,hasvk: Replace intel_clflush_range with intel_flush_range

Signed-off-by: Jordan Justen <[email protected]>
Reviewed-by: Lionel Landwerlin <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22379>

---

 src/intel/common/intel_mem.c        | 2 +-
 src/intel/common/intel_mem.h        | 1 -
 src/intel/vulkan/anv_device.c       | 8 ++++----
 src/intel/vulkan/anv_utrace.c       | 2 +-
 src/intel/vulkan/anv_wsi.c          | 2 +-
 src/intel/vulkan_hasvk/anv_device.c | 8 ++++----
 src/intel/vulkan_hasvk/anv_wsi.c    | 2 +-
 7 files changed, 12 insertions(+), 13 deletions(-)

diff --git a/src/intel/common/intel_mem.c b/src/intel/common/intel_mem.c
index 8d8452db76f..6ba4670b1ac 100644
--- a/src/intel/common/intel_mem.c
+++ b/src/intel/common/intel_mem.c
@@ -26,7 +26,7 @@
 #include <stdint.h>
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-void
+static void
 intel_clflush_range(void *start, size_t size)
 {
    void *p = (void *) (((uintptr_t) start) & ~CACHELINE_MASK);
diff --git a/src/intel/common/intel_mem.h b/src/intel/common/intel_mem.h
index 599995d4d01..f8a4f29bbf2 100644
--- a/src/intel/common/intel_mem.h
+++ b/src/intel/common/intel_mem.h
@@ -34,7 +34,6 @@ extern "C" {
 #define CACHELINE_MASK 63
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
-void intel_clflush_range(void *start, size_t size);
 void intel_flush_range(void *start, size_t size);
 void intel_invalidate_range(void *start, size_t size);
 #endif
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index ea8051705e1..55e95569b18 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -2854,7 +2854,7 @@ anv_device_init_trivial_batch(struct anv_device *device)
 
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
    if (device->physical->memory.need_flush)
-      intel_clflush_range(batch.start, batch.next - batch.start);
+      intel_flush_range(batch.start, batch.next - batch.start);
 #endif
 
    return VK_SUCCESS;
@@ -4211,9 +4211,9 @@ VkResult anv_FlushMappedMemoryRanges(
       if (map_offset >= mem->map_size)
          continue;
 
-      intel_clflush_range(mem->map + map_offset,
-                          MIN2(pMemoryRanges[i].size,
-                               mem->map_size - map_offset));
+      intel_flush_range(mem->map + map_offset,
+                        MIN2(pMemoryRanges[i].size,
+                             mem->map_size - map_offset));
    }
 #endif
    return VK_SUCCESS;
diff --git a/src/intel/vulkan/anv_utrace.c b/src/intel/vulkan/anv_utrace.c
index 2602568c53d..22b6d42e7ad 100644
--- a/src/intel/vulkan/anv_utrace.c
+++ b/src/intel/vulkan/anv_utrace.c
@@ -249,7 +249,7 @@ anv_utrace_create_ts_buffer(struct u_trace_context *utctx, 
uint32_t size_b)
    memset(bo->map, 0, bo->size);
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
    if (device->physical->memory.need_flush)
-         intel_clflush_range(bo->map, bo->size);
+      intel_flush_range(bo->map, bo->size);
 #endif
 
    return bo;
diff --git a/src/intel/vulkan/anv_wsi.c b/src/intel/vulkan/anv_wsi.c
index b8a07ec8125..04b87bf60da 100644
--- a/src/intel/vulkan/anv_wsi.c
+++ b/src/intel/vulkan/anv_wsi.c
@@ -115,7 +115,7 @@ VkResult anv_QueuePresentKHR(
       device->debug_frame_desc->frame_id++;
 #ifdef SUPPORT_INTEL_INTEGRATED_GPUS
       if (device->physical->memory.need_flush) {
-         intel_clflush_range(device->debug_frame_desc,
+         intel_flush_range(device->debug_frame_desc,
                            sizeof(*device->debug_frame_desc));
       }
 #endif
diff --git a/src/intel/vulkan_hasvk/anv_device.c 
b/src/intel/vulkan_hasvk/anv_device.c
index 4e917b09c3c..e25beba1985 100644
--- a/src/intel/vulkan_hasvk/anv_device.c
+++ b/src/intel/vulkan_hasvk/anv_device.c
@@ -2536,7 +2536,7 @@ anv_device_init_trivial_batch(struct anv_device *device)
    anv_batch_emit(&batch, GFX7_MI_NOOP, noop);
 
    if (device->physical->memory.need_flush)
-      intel_clflush_range(batch.start, batch.next - batch.start);
+      intel_flush_range(batch.start, batch.next - batch.start);
 
    return VK_SUCCESS;
 }
@@ -3693,9 +3693,9 @@ VkResult anv_FlushMappedMemoryRanges(
       if (map_offset >= mem->map_size)
          continue;
 
-      intel_clflush_range(mem->map + map_offset,
-                          MIN2(pMemoryRanges[i].size,
-                               mem->map_size - map_offset));
+      intel_flush_range(mem->map + map_offset,
+                        MIN2(pMemoryRanges[i].size,
+                             mem->map_size - map_offset));
    }
 
    return VK_SUCCESS;
diff --git a/src/intel/vulkan_hasvk/anv_wsi.c b/src/intel/vulkan_hasvk/anv_wsi.c
index df18bd0168d..9ba7b32f356 100644
--- a/src/intel/vulkan_hasvk/anv_wsi.c
+++ b/src/intel/vulkan_hasvk/anv_wsi.c
@@ -98,7 +98,7 @@ VkResult anv_QueuePresentKHR(
    if (device->debug_frame_desc) {
       device->debug_frame_desc->frame_id++;
       if (device->physical->memory.need_flush) {
-         intel_clflush_range(device->debug_frame_desc,
+         intel_flush_range(device->debug_frame_desc,
                            sizeof(*device->debug_frame_desc));
       }
    }

Reply via email to