Module: Mesa Branch: main Commit: 10dc97b20ff6b6987d016edaf0e78395a18cd04e URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=10dc97b20ff6b6987d016edaf0e78395a18cd04e
Author: Samuel Pitoiset <[email protected]> Date: Wed Sep 13 14:32:58 2023 +0200 ac/gpu_info: init num_cu_per_sh from the kernel This will be used to configure the number of instances of TCP. Signed-off-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25211> --- src/amd/common/ac_gpu_info.c | 2 ++ src/amd/common/ac_gpu_info.h | 1 + 2 files changed, 3 insertions(+) diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 480b2d95beb..e8ec9ce7e71 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -986,6 +986,7 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info, info->max_tcc_blocks = device_info.num_tcc_blocks; info->max_se = device_info.num_shader_engines; info->max_sa_per_se = device_info.num_shader_arrays_per_engine; + info->num_cu_per_sh = device_info.num_cu_per_sh; info->uvd_fw_version = info->ip[AMD_IP_UVD].num_queues ? uvd_version : 0; info->vce_fw_version = info->ip[AMD_IP_VCE].num_queues ? vce_version : 0; @@ -1828,6 +1829,7 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f) fprintf(f, " min_good_cu_per_sa = %i\n", info->min_good_cu_per_sa); fprintf(f, " max_se = %i\n", info->max_se); fprintf(f, " max_sa_per_se = %i\n", info->max_sa_per_se); + fprintf(f, " num_cu_per_sh = %i\n", info->num_cu_per_sh); fprintf(f, " max_wave64_per_simd = %i\n", info->max_wave64_per_simd); fprintf(f, " num_physical_sgprs_per_simd = %i\n", info->num_physical_sgprs_per_simd); fprintf(f, " num_physical_wave64_vgprs_per_simd = %i\n", diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index 5cfa4561ccc..186853327ea 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -229,6 +229,7 @@ struct radeon_info { uint32_t min_good_cu_per_sa; /* min != max if SAs have different # of CUs */ uint32_t max_se; /* number of shader engines incl. disabled ones */ uint32_t max_sa_per_se; /* shader arrays per shader engine */ + uint32_t num_cu_per_sh; uint32_t max_wave64_per_simd; uint32_t num_physical_sgprs_per_simd; uint32_t num_physical_wave64_vgprs_per_simd;
