Module: Mesa Branch: main Commit: e04e491cc7e85757995144642842bb9b9016cf52 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e04e491cc7e85757995144642842bb9b9016cf52
Author: Jordan Justen <jordan.l.jus...@intel.com> Date: Tue Oct 17 14:53:57 2023 -0700 intel/dev: Rename mtl-m to mtl-u Ref: bspec 55414 Suggested-by: José Roberto de Souza <jose.so...@intel.com> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com> Reviewed-by: Sagar Ghuge <sagar.gh...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25857> --- include/pci_ids/iris_pci_ids.h | 4 +- src/intel/common/intel_l3_config.c | 2 +- src/intel/dev/gen_wa_helpers.py | 2 +- src/intel/dev/intel_device_info.c | 4 +- src/intel/dev/intel_device_info.h | 2 +- src/intel/dev/mesa_defs.json | 86 +++++++++++++++++++------------------- src/intel/perf/intel_perf.c | 2 +- 7 files changed, 51 insertions(+), 51 deletions(-) diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h index f42dc504d55..ec4ceb3cebf 100644 --- a/include/pci_ids/iris_pci_ids.h +++ b/include/pci_ids/iris_pci_ids.h @@ -252,8 +252,8 @@ CHIPSET(0x56bd, dg2_g11, "DG2", "Intel(R) Graphics") CHIPSET(0x56c0, atsm_g10, "ATS-M", "Intel(R) Data Center GPU Flex Series 170 Graphics") CHIPSET(0x56c1, atsm_g11, "ATS-M", "Intel(R) Data Center GPU Flex Series 140 Graphics") -CHIPSET(0x7d40, mtl_m, "MTL", "Intel(R) Graphics") +CHIPSET(0x7d40, mtl_u, "MTL", "Intel(R) Graphics") CHIPSET(0x7d45, mtl_p, "MTL", "Intel(R) Graphics") CHIPSET(0x7d55, mtl_p, "MTL", "Intel(R) Arc(tm) Graphics") -CHIPSET(0x7d60, mtl_m, "MTL", "Intel(R) Graphics") +CHIPSET(0x7d60, mtl_u, "MTL", "Intel(R) Graphics") CHIPSET(0x7dd5, mtl_p, "MTL", "Intel(R) Graphics") diff --git a/src/intel/common/intel_l3_config.c b/src/intel/common/intel_l3_config.c index f56d41cd82e..6b3536b8c59 100644 --- a/src/intel/common/intel_l3_config.c +++ b/src/intel/common/intel_l3_config.c @@ -349,7 +349,7 @@ get_l3_way_size(const struct intel_device_info *devinfo) * ways. See BSpec 45319. */ const unsigned way_size_per_bank = - devinfo->platform == INTEL_PLATFORM_MTL_M ? 8 : + devinfo->platform == INTEL_PLATFORM_MTL_U ? 8 : (devinfo->ver >= 9 && devinfo->l3_banks == 1) || devinfo->ver >= 11 ? 4 : 2; diff --git a/src/intel/dev/gen_wa_helpers.py b/src/intel/dev/gen_wa_helpers.py index d9f473d0d66..e69d3ab63e2 100644 --- a/src/intel/dev/gen_wa_helpers.py +++ b/src/intel/dev/gen_wa_helpers.py @@ -201,7 +201,7 @@ _PLATFORM_GFXVERS = {"INTEL_PLATFORM_BDW" : 80, "INTEL_PLATFORM_DG2_G10" : 125, "INTEL_PLATFORM_DG2_G11" : 125, "INTEL_PLATFORM_DG2_G12" : 125, - "INTEL_PLATFORM_MTL_M" : 125, + "INTEL_PLATFORM_MTL_U" : 125, "INTEL_PLATFORM_MTL_P" : 125, } diff --git a/src/intel/dev/intel_device_info.c b/src/intel/dev/intel_device_info.c index ea102a90a0a..f33d9c06446 100644 --- a/src/intel/dev/intel_device_info.c +++ b/src/intel/dev/intel_device_info.c @@ -1142,9 +1142,9 @@ static const struct intel_device_info intel_device_info_atsm_g11 = { .writeback = 0, \ } -static const struct intel_device_info intel_device_info_mtl_m = { +static const struct intel_device_info intel_device_info_mtl_u = { MTL_FEATURES, - .platform = INTEL_PLATFORM_MTL_M, + .platform = INTEL_PLATFORM_MTL_U, }; static const struct intel_device_info intel_device_info_mtl_p = { diff --git a/src/intel/dev/intel_device_info.h b/src/intel/dev/intel_device_info.h index 19f220a2a9e..5c13377caf8 100644 --- a/src/intel/dev/intel_device_info.h +++ b/src/intel/dev/intel_device_info.h @@ -79,7 +79,7 @@ enum intel_platform { INTEL_PLATFORM_GROUP_END(DG2, INTEL_PLATFORM_DG2_G12), INTEL_PLATFORM_GROUP_START(ATSM, INTEL_PLATFORM_ATSM_G10), INTEL_PLATFORM_GROUP_END(ATSM, INTEL_PLATFORM_ATSM_G11), - INTEL_PLATFORM_GROUP_START(MTL, INTEL_PLATFORM_MTL_M), + INTEL_PLATFORM_GROUP_START(MTL, INTEL_PLATFORM_MTL_U), INTEL_PLATFORM_GROUP_END(MTL, INTEL_PLATFORM_MTL_P), INTEL_PLATFORM_LNL, }; diff --git a/src/intel/dev/mesa_defs.json b/src/intel/dev/mesa_defs.json index 7849ce74e93..a6c85678b42 100644 --- a/src/intel/dev/mesa_defs.json +++ b/src/intel/dev/mesa_defs.json @@ -568,7 +568,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015960633 ], @@ -1370,7 +1370,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014479981 ], @@ -1404,7 +1404,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14012688258 ], @@ -1527,7 +1527,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014076924 ], @@ -1590,7 +1590,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014152458 ], @@ -1639,7 +1639,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014194805 ], @@ -1673,7 +1673,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014431879 ], @@ -1701,7 +1701,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014919532 ], @@ -1776,7 +1776,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014898572 ], @@ -1811,7 +1811,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015314187 ], @@ -1854,7 +1854,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14018010541 ], @@ -1907,7 +1907,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 22014104874 ], @@ -1942,7 +1942,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015812559 ], @@ -1970,7 +1970,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015868602 ], @@ -2067,7 +2067,7 @@ }, "14016243945": { "mesa_platforms": { - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016243945 ], @@ -2090,7 +2090,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017065012 ], @@ -2112,7 +2112,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016755109 ], @@ -2144,7 +2144,7 @@ }, "14017240301": { "mesa_platforms": { - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017240301, 14017330959 @@ -2161,7 +2161,7 @@ }, "14017245111": { "mesa_platforms": { - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017348303 ], @@ -2211,7 +2211,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017521231 ], @@ -2321,7 +2321,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14018952577 ], @@ -2364,7 +2364,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14018919798 ], @@ -2374,7 +2374,7 @@ }, "14019028097": { "mesa_platforms": { - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14019103057 ], @@ -2410,7 +2410,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016821875 ], @@ -2603,7 +2603,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 16011627967 ], @@ -2653,7 +2653,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015514779 ], @@ -2697,7 +2697,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 16013099041 ], @@ -2747,7 +2747,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016872205 ], @@ -2802,7 +2802,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015821291 ], @@ -2836,7 +2836,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015219714 ], @@ -2892,7 +2892,7 @@ }, "16016015852": { "mesa_platforms": { - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016272710 ], @@ -2914,7 +2914,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017509079 ], @@ -2986,7 +2986,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14013840342 ], @@ -3036,7 +3036,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015841588 ], @@ -3113,7 +3113,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015591654 ], @@ -3148,7 +3148,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14015846284 ], @@ -3183,7 +3183,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016763783 ], @@ -3259,7 +3259,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017483381 ], @@ -3342,7 +3342,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017085266 ], @@ -3397,7 +3397,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14017879046, 18023881693 @@ -3589,7 +3589,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14014906135 ], @@ -3646,7 +3646,7 @@ ], "steppings": "all" }, - "INTEL_PLATFORM_MTL_M": { + "INTEL_PLATFORM_MTL_U": { "ids": [ 14016119375 ], @@ -3676,4 +3676,4 @@ } } } -} \ No newline at end of file +} diff --git a/src/intel/perf/intel_perf.c b/src/intel/perf/intel_perf.c index 52f4d989e7a..ea89f8ecfe7 100644 --- a/src/intel/perf/intel_perf.c +++ b/src/intel/perf/intel_perf.c @@ -489,7 +489,7 @@ get_register_queries_function(const struct intel_device_info *devinfo) return intel_oa_register_queries_acmgt1; case INTEL_PLATFORM_DG2_G12: return intel_oa_register_queries_acmgt2; - case INTEL_PLATFORM_MTL_M: + case INTEL_PLATFORM_MTL_U: case INTEL_PLATFORM_MTL_P: if (intel_device_info_eu_total(devinfo) <= 64) return intel_oa_register_queries_mtlgt2;
