Module: Mesa Branch: main Commit: f4601d82c134fbffea4f153277300d8e98f96f84 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=f4601d82c134fbffea4f153277300d8e98f96f84
Author: Caio Oliveira <caio.olive...@intel.com> Date: Tue Oct 31 23:58:46 2023 -0700 intel/compiler: Remove unused parameter from brw_nir_analyze_ubo_ranges() This parameter was used by i965 driver that is now gone. Reviewed-by: Sagar Ghuge <sagar.gh...@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25986> --- src/gallium/drivers/crocus/crocus_program.c | 10 +++++----- src/gallium/drivers/iris/iris_program.c | 10 +++++----- src/intel/compiler/brw_nir.h | 1 - src/intel/compiler/brw_nir_analyze_ubo_ranges.c | 20 ++++---------------- src/intel/vulkan/anv_internal_kernels.c | 2 +- src/intel/vulkan/anv_nir_compute_push_layout.c | 2 +- src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c | 2 +- 7 files changed, 17 insertions(+), 30 deletions(-) diff --git a/src/gallium/drivers/crocus/crocus_program.c b/src/gallium/drivers/crocus/crocus_program.c index b51757a9e0c..1fc8ad50d1b 100644 --- a/src/gallium/drivers/crocus/crocus_program.c +++ b/src/gallium/drivers/crocus/crocus_program.c @@ -1202,7 +1202,7 @@ crocus_compile_vs(struct crocus_context *ice, num_system_values, num_cbufs, &key->base.tex); if (can_push_ubo(devinfo)) - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); uint64_t outputs_written = crocus_vs_outputs_written(ice, key, nir->info.outputs_written); @@ -1411,7 +1411,7 @@ crocus_compile_tcs(struct crocus_context *ice, crocus_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs, &key->base.tex); if (can_push_ubo(devinfo)) - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_tcs_prog_key key_clean = *key; crocus_sanitize_tex_key(&key_clean.base.tex); @@ -1551,7 +1551,7 @@ crocus_compile_tes(struct crocus_context *ice, num_system_values, num_cbufs, &key->base.tex); if (can_push_ubo(devinfo)) - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_vue_map input_vue_map; brw_compute_tess_vue_map(&input_vue_map, key->inputs_read, @@ -1694,7 +1694,7 @@ crocus_compile_gs(struct crocus_context *ice, num_system_values, num_cbufs, &key->base.tex); if (can_push_ubo(devinfo)) - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); brw_compute_vue_map(devinfo, &vue_prog_data->vue_map, nir->info.outputs_written, @@ -1836,7 +1836,7 @@ crocus_compile_fs(struct crocus_context *ice, &key->base.tex); if (can_push_ubo(devinfo)) - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_wm_prog_key key_clean = *key; crocus_sanitize_tex_key(&key_clean.base.tex); diff --git a/src/gallium/drivers/iris/iris_program.c b/src/gallium/drivers/iris/iris_program.c index f43d9b1fa54..f8f22c08f7f 100644 --- a/src/gallium/drivers/iris/iris_program.c +++ b/src/gallium/drivers/iris/iris_program.c @@ -1322,7 +1322,7 @@ iris_compile_vs(struct iris_screen *screen, iris_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs); - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); brw_compute_vue_map(devinfo, &vue_prog_data->vue_map, nir->info.outputs_written, @@ -1504,7 +1504,7 @@ iris_compile_tcs(struct iris_screen *screen, &num_system_values, &num_cbufs); iris_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs); - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_compile_tcs_params params = { .base = { @@ -1664,7 +1664,7 @@ iris_compile_tes(struct iris_screen *screen, iris_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs); - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_vue_map input_vue_map; brw_compute_tess_vue_map(&input_vue_map, key->inputs_read, @@ -1807,7 +1807,7 @@ iris_compile_gs(struct iris_screen *screen, iris_setup_binding_table(devinfo, nir, &bt, /* num_render_targets */ 0, num_system_values, num_cbufs); - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); brw_compute_vue_map(devinfo, &vue_prog_data->vue_map, nir->info.outputs_written, @@ -1951,7 +1951,7 @@ iris_compile_fs(struct iris_screen *screen, MAX2(key->nr_color_regions, null_rts), num_system_values, num_cbufs); - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); struct brw_wm_prog_key brw_key = iris_to_brw_fs_key(screen, key); diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h index fc365cc0f0a..c93c64223c8 100644 --- a/src/intel/compiler/brw_nir.h +++ b/src/intel/compiler/brw_nir.h @@ -253,7 +253,6 @@ bool brw_nir_should_vectorize_mem(unsigned align_mul, unsigned align_offset, void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler, nir_shader *nir, - const struct brw_vs_prog_key *vs_key, struct brw_ubo_range out_ranges[4]); bool brw_nir_opt_peephole_ffma(nir_shader *shader); diff --git a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c index c972b89a729..ab7c8323c85 100644 --- a/src/intel/compiler/brw_nir_analyze_ubo_ranges.c +++ b/src/intel/compiler/brw_nir_analyze_ubo_ranges.c @@ -189,7 +189,6 @@ print_ubo_entry(FILE *file, void brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler, nir_shader *nir, - const struct brw_vs_prog_key *vs_key, struct brw_ubo_range out_ranges[4]) { void *mem_ctx = ralloc_context(NULL); @@ -200,22 +199,11 @@ brw_nir_analyze_ubo_ranges(const struct brw_compiler *compiler, _mesa_hash_table_create(mem_ctx, NULL, _mesa_key_pointer_equal), }; - switch (nir->info.stage) { - case MESA_SHADER_VERTEX: - if (vs_key && vs_key->nr_userclip_plane_consts > 0) - state.uses_regular_uniforms = true; - break; - - case MESA_SHADER_COMPUTE: - /* Compute shaders use push constants to get the subgroup ID so it's - * best to just assume some system values are pushed. - */ + /* Compute shaders use push constants to get the subgroup ID so it's + * best to just assume some system values are pushed. + */ + if (nir->info.stage == MESA_SHADER_COMPUTE) state.uses_regular_uniforms = true; - break; - - default: - break; - } /* Walk the IR, recording how many times each UBO block/offset is used. */ nir_foreach_function_impl(impl, nir) { diff --git a/src/intel/vulkan/anv_internal_kernels.c b/src/intel/vulkan/anv_internal_kernels.c index 077d7ebe177..5f90e4e359b 100644 --- a/src/intel/vulkan/anv_internal_kernels.c +++ b/src/intel/vulkan/anv_internal_kernels.c @@ -243,7 +243,7 @@ compile_upload_spirv(struct anv_device *device, memset(&prog_data, 0, sizeof(prog_data)); prog_data.base.nr_params = nir->num_uniforms / 4; - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data.base.ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data.base.ubo_ranges); void *temp_ctx = ralloc_context(NULL); diff --git a/src/intel/vulkan/anv_nir_compute_push_layout.c b/src/intel/vulkan/anv_nir_compute_push_layout.c index 864a234df4d..ef9f7634a36 100644 --- a/src/intel/vulkan/anv_nir_compute_push_layout.c +++ b/src/intel/vulkan/anv_nir_compute_push_layout.c @@ -210,7 +210,7 @@ anv_nir_compute_push_layout(nir_shader *nir, } if (push_ubo_ranges) { - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); /* The vec4 back-end pushes at most 32 regs while the scalar back-end * pushes up to 64. This is primarily because the scalar back-end has a diff --git a/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c b/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c index f516ef14ca4..b85b4926c61 100644 --- a/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c +++ b/src/intel/vulkan_hasvk/anv_nir_compute_push_layout.c @@ -157,7 +157,7 @@ anv_nir_compute_push_layout(nir_shader *nir, } if (push_ubo_ranges) { - brw_nir_analyze_ubo_ranges(compiler, nir, NULL, prog_data->ubo_ranges); + brw_nir_analyze_ubo_ranges(compiler, nir, prog_data->ubo_ranges); /* The vec4 back-end pushes at most 32 regs while the scalar back-end * pushes up to 64. This is primarily because the scalar back-end has a
