Module: Mesa Branch: main Commit: 46cc7ffb7982091cdbded41e27d8f9a0b9ee5359 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=46cc7ffb7982091cdbded41e27d8f9a0b9ee5359
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue Nov 21 16:24:39 2023 +0100 radv: add missing FDCC_CONTROL bits for GFX1103 R2 Ported from RadeonSI. Found by inspection, untested. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26318> --- src/amd/vulkan/radv_device.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index bc98c173207..684929e0184 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -1546,6 +1546,10 @@ radv_init_dcc_control_reg(struct radv_device *device, struct radv_image_view *iv result |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX11(independent_128b_blocks) | S_028C78_DISABLE_CONSTANT_ENCODE_REG(1) | S_028C78_FDCC_ENABLE(radv_dcc_enabled(iview->image, iview->vk.base_mip_level)); + + if (device->physical_device->rad_info.family >= CHIP_GFX1103_R2) { + result |= S_028C78_ENABLE_MAX_COMP_FRAG_OVERRIDE(1) | S_028C78_MAX_COMP_FRAGS(iview->image->vk.samples >= 4); + } } else { result |= S_028C78_INDEPENDENT_128B_BLOCKS_GFX10(independent_128b_blocks); }
