Module: Mesa Branch: main Commit: 02ef01fa958eb97b3c8ba4f26627d77c076af59b URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=02ef01fa958eb97b3c8ba4f26627d77c076af59b
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Mon Nov 13 10:02:49 2023 +0100 radv: enable DGC preprocessing for IBO This seems to improve performance for Starfield by +1% and Halo Infinite by +15%! Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10025 Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26172> --- src/amd/vulkan/radv_device_generated_commands.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/amd/vulkan/radv_device_generated_commands.c b/src/amd/vulkan/radv_device_generated_commands.c index 336ad9e8aec..bb49742a682 100644 --- a/src/amd/vulkan/radv_device_generated_commands.c +++ b/src/amd/vulkan/radv_device_generated_commands.c @@ -1505,10 +1505,6 @@ radv_dgc_can_preprocess(const struct radv_indirect_command_layout *layout, struc * So we can always preprocess compute layouts. */ if (layout->pipeline_bind_point != VK_PIPELINE_BIND_POINT_COMPUTE) { - /* We embed the index buffer extent in indirect draw packets, but that isn't available at preprocess time. */ - if (layout->indexed && !layout->binds_index_buffer) - return false; - /* VBO binding (in particular partial VBO binding) uses some draw state which we don't generate at preprocess time * yet. */ if (layout->bind_vbo_mask)
