Module: Mesa Branch: main Commit: e425f92f3eddc9f38675789103daeb81fd8a5c17 URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=e425f92f3eddc9f38675789103daeb81fd8a5c17
Author: Samuel Pitoiset <samuel.pitoi...@gmail.com> Date: Tue Nov 21 11:36:41 2023 +0100 radv: simplify creating image views for src resolve images The Vulkan spec says: "If samples is not VK_SAMPLE_COUNT_1_BIT, then imageType must be VK_IMAGE_TYPE_2D, flags must not contain VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT, mipLevels must be equal to 1..." So, the source image is always 2D with no mipmaps. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26316> --- src/amd/vulkan/meta/radv_meta_resolve.c | 14 +++++--------- src/amd/vulkan/meta/radv_meta_resolve_cs.c | 12 +++++------- src/amd/vulkan/meta/radv_meta_resolve_fs.c | 10 ++++------ 3 files changed, 14 insertions(+), 22 deletions(-) diff --git a/src/amd/vulkan/meta/radv_meta_resolve.c b/src/amd/vulkan/meta/radv_meta_resolve.c index 6414074db6a..7556b947e9a 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve.c +++ b/src/amd/vulkan/meta/radv_meta_resolve.c @@ -353,8 +353,6 @@ radv_meta_resolve_hardware_image(struct radv_cmd_buffer *cmd_buffer, struct radv assert(vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource) == vk_image_subresource_layer_count(&dst_image->vk, ®ion->dstSubresource)); - const uint32_t src_base_layer = radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, ®ion->srcOffset); - const uint32_t dst_base_layer = radv_meta_get_iview_layer(dst_image, ®ion->dstSubresource, ®ion->dstOffset); /** @@ -418,14 +416,14 @@ radv_meta_resolve_hardware_image(struct radv_cmd_buffer *cmd_buffer, struct radv &(VkImageViewCreateInfo){ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(src_image), - .viewType = radv_meta_get_view_type(src_image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = src_image->vk.format, .subresourceRange = { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = region->srcSubresource.mipLevel, + .baseMipLevel = 0, .levelCount = 1, - .baseArrayLayer = src_base_layer + layer, + .baseArrayLayer = region->srcSubresource.baseArrayLayer + layer, .layerCount = 1, }, }, @@ -828,8 +826,6 @@ void radv_decompress_resolve_src(struct radv_cmd_buffer *cmd_buffer, struct radv_image *src_image, VkImageLayout src_image_layout, const VkImageResolve2 *region) { - const uint32_t src_base_layer = radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, ®ion->srcOffset); - VkImageMemoryBarrier2 barrier = { .sType = VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER_2, .srcStageMask = VK_PIPELINE_STAGE_2_TOP_OF_PIPE_BIT, @@ -841,9 +837,9 @@ radv_decompress_resolve_src(struct radv_cmd_buffer *cmd_buffer, struct radv_imag .image = radv_image_to_handle(src_image), .subresourceRange = (VkImageSubresourceRange){ .aspectMask = region->srcSubresource.aspectMask, - .baseMipLevel = region->srcSubresource.mipLevel, + .baseMipLevel = 0, .levelCount = 1, - .baseArrayLayer = src_base_layer, + .baseArrayLayer = region->srcSubresource.baseArrayLayer, .layerCount = vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource), }}; diff --git a/src/amd/vulkan/meta/radv_meta_resolve_cs.c b/src/amd/vulkan/meta/radv_meta_resolve_cs.c index a2e2f6d8618..423d0f5326d 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve_cs.c +++ b/src/amd/vulkan/meta/radv_meta_resolve_cs.c @@ -611,8 +611,6 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_ assert(vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource) == vk_image_subresource_layer_count(&dst_image->vk, ®ion->dstSubresource)); - const uint32_t src_base_layer = radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, ®ion->srcOffset); - const uint32_t dst_base_layer = radv_meta_get_iview_layer(dst_image, ®ion->dstSubresource, ®ion->dstOffset); const struct VkExtent3D extent = vk_image_sanitize_extent(&src_image->vk, region->extent); @@ -627,14 +625,14 @@ radv_meta_resolve_compute_image(struct radv_cmd_buffer *cmd_buffer, struct radv_ &(VkImageViewCreateInfo){ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(src_image), - .viewType = radv_meta_get_view_type(src_image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = src_format, .subresourceRange = { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = region->srcSubresource.mipLevel, + .baseMipLevel = 0, .levelCount = 1, - .baseArrayLayer = src_base_layer + layer, + .baseArrayLayer = region->srcSubresource.baseArrayLayer + layer, .layerCount = 1, }, }, @@ -743,12 +741,12 @@ radv_depth_stencil_resolve_rendering_cs(struct radv_cmd_buffer *cmd_buffer, VkIm &(VkImageViewCreateInfo){ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(src_image), - .viewType = radv_meta_get_view_type(src_image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = src_iview->vk.format, .subresourceRange = { .aspectMask = aspects, - .baseMipLevel = src_iview->vk.base_mip_level, + .baseMipLevel = 0, .levelCount = 1, .baseArrayLayer = src_iview->vk.base_array_layer, .layerCount = layer_count, diff --git a/src/amd/vulkan/meta/radv_meta_resolve_fs.c b/src/amd/vulkan/meta/radv_meta_resolve_fs.c index 3c3f45dd2c0..80111a4de36 100644 --- a/src/amd/vulkan/meta/radv_meta_resolve_fs.c +++ b/src/amd/vulkan/meta/radv_meta_resolve_fs.c @@ -729,8 +729,6 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv assert(vk_image_subresource_layer_count(&src_image->vk, ®ion->srcSubresource) == vk_image_subresource_layer_count(&dst_image->vk, ®ion->dstSubresource)); - const uint32_t src_base_layer = radv_meta_get_iview_layer(src_image, ®ion->srcSubresource, ®ion->srcOffset); - const uint32_t dst_base_layer = radv_meta_get_iview_layer(dst_image, ®ion->dstSubresource, ®ion->dstOffset); const struct VkExtent3D extent = vk_image_sanitize_extent(&src_image->vk, region->extent); @@ -761,14 +759,14 @@ radv_meta_resolve_fragment_image(struct radv_cmd_buffer *cmd_buffer, struct radv &(VkImageViewCreateInfo){ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(src_image), - .viewType = radv_meta_get_view_type(src_image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = src_image->vk.format, .subresourceRange = { .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT, - .baseMipLevel = region->srcSubresource.mipLevel, + .baseMipLevel = 0, .levelCount = 1, - .baseArrayLayer = src_base_layer + layer, + .baseArrayLayer = region->srcSubresource.baseArrayLayer + layer, .layerCount = 1, }, }, @@ -941,7 +939,7 @@ radv_depth_stencil_resolve_rendering_fs(struct radv_cmd_buffer *cmd_buffer, VkIm &(VkImageViewCreateInfo){ .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO, .image = radv_image_to_handle(src_image), - .viewType = radv_meta_get_view_type(src_image), + .viewType = VK_IMAGE_VIEW_TYPE_2D, .format = src_iview->vk.format, .subresourceRange = {
