Module: Mesa Branch: main Commit: 3e46ee61d557b0a1cee9930e708a3603dec8c34d URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=3e46ee61d557b0a1cee9930e708a3603dec8c34d
Author: Rohan Garg <[email protected]> Date: Fri Dec 1 20:17:54 2023 -0800 intel/fs/xe2+: Lift CPS dispatch width restrictions on Xe2+. These restrictions don't seem to be applicable anymore, and limiting to SIMD8 wouldn't work since we're no longer building shaders with that dispatch width. [ Francisco: This one-liner change was squashed by Rohan Garg into a previous version of my patch "Stop building SIMD8 programs", but it makes more sense as a separate commit -- Formatted as a separate patch. ] Reviewed-by: Francisco Jerez <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26605> --- src/intel/compiler/brw_fs.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 463fed158c8..a5b7355b448 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -7643,7 +7643,7 @@ brw_compile_fs(const struct brw_compiler *compiler, "using SIMD8 when dual src blending.\n"); } - if (key->coarse_pixel) { + if (key->coarse_pixel && devinfo->ver < 20) { if (prog_data->dual_src_blend) { v8->limit_dispatch_width(8, "SIMD16 coarse pixel shading cannot" " use SIMD8 messages.\n");
