Module: Mesa Branch: main Commit: 0f87d406b58aa103ae67f3cc8a694c1343d8f8ed URL: http://cgit.freedesktop.org/mesa/mesa/commit/?id=0f87d406b58aa103ae67f3cc8a694c1343d8f8ed
Author: Konstantin Seurer <konstantin.seu...@gmail.com> Date: Tue Sep 12 17:15:40 2023 +0200 radv/rt: Skip compiling a traversal shader If we don't need one, we don't compile one. Reviewed-by: Friedrich Vock <friedrich.v...@gmx.de> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25224> --- src/amd/vulkan/radv_cmd_buffer.c | 12 ++++++++---- src/amd/vulkan/radv_pipeline_rt.c | 21 +++++++++++++++++---- 2 files changed, 25 insertions(+), 8 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 81d553cf32f..38257ad1a00 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -6259,8 +6259,11 @@ radv_emit_compute_pipeline(struct radv_cmd_buffer *cmd_buffer, struct radv_compu radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, cmd_buffer->state.shaders[MESA_SHADER_COMPUTE]->bo); } else { radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, cmd_buffer->state.rt_prolog->bo); - radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, - cmd_buffer->state.shaders[MESA_SHADER_INTERSECTION]->bo); + + if (cmd_buffer->state.shaders[MESA_SHADER_INTERSECTION]) + radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, + cmd_buffer->state.shaders[MESA_SHADER_INTERSECTION]->bo); + struct radv_ray_tracing_pipeline *rt_pipeline = radv_pipeline_to_ray_tracing(&pipeline->base); for (unsigned i = 0; i < rt_pipeline->stage_count; ++i) { if (!radv_ray_tracing_stage_is_compiled(&rt_pipeline->stages[i])) @@ -10066,8 +10069,9 @@ radv_trace_rays(struct radv_cmd_buffer *cmd_buffer, VkTraceRaysIndirectCommand2K } const struct radv_userdata_info *shader_loc = radv_get_user_sgpr(rt_prolog, AC_UD_CS_TRAVERSAL_SHADER_ADDR); - if (shader_loc->sgpr_idx != -1) { - uint64_t traversal_va = cmd_buffer->state.shaders[MESA_SHADER_INTERSECTION]->va | radv_rt_priority_traversal; + struct radv_shader *traversal_shader = cmd_buffer->state.shaders[MESA_SHADER_INTERSECTION]; + if (shader_loc->sgpr_idx != -1 && traversal_shader) { + uint64_t traversal_va = traversal_shader->va | radv_rt_priority_traversal; radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs, base_reg + shader_loc->sgpr_idx * 4, traversal_va, true); } diff --git a/src/amd/vulkan/radv_pipeline_rt.c b/src/amd/vulkan/radv_pipeline_rt.c index e1b324f6d42..f2ec9a1a1ea 100644 --- a/src/amd/vulkan/radv_pipeline_rt.c +++ b/src/amd/vulkan/radv_pipeline_rt.c @@ -500,7 +500,9 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca if (!stages) return VK_ERROR_OUT_OF_HOST_MEMORY; - bool monolithic = !(pipeline->base.base.create_flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR); + bool library = pipeline->base.base.create_flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR; + + bool monolithic = !library; for (uint32_t i = 0; i < pCreateInfo->stageCount; i++) { if (rt_stages[i].shader || rt_stages[i].nir) continue; @@ -519,9 +521,14 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca } bool has_callable = false; + /* TODO: Recompile recursive raygen shaders instead. */ + bool raygen_imported = false; for (uint32_t i = 0; i < pipeline->stage_count; i++) { has_callable |= rt_stages[i].stage == MESA_SHADER_CALLABLE; monolithic &= rt_stages[i].can_inline; + + if (i > pCreateInfo->stageCount) + raygen_imported |= rt_stages[i].stage == MESA_SHADER_RAYGEN; } for (uint32_t idx = 0; idx < pCreateInfo->stageCount; idx++) { @@ -540,7 +547,6 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca * - monolithic: Callable shaders (chit/miss) are inlined into the raygen shader. */ bool compiled = radv_ray_tracing_stage_is_compiled(&rt_stages[idx]); - bool library = pCreateInfo->flags & VK_PIPELINE_CREATE_LIBRARY_BIT_KHR; bool nir_needed = (library && !has_callable) || !compiled || (monolithic && rt_stages[idx].stage != MESA_SHADER_RAYGEN); nir_needed &= !rt_stages[idx].nir; @@ -589,7 +595,11 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca } } - if (pipeline->base.base.create_flags & VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR) + /* Monolithic raygen shaders do not need a traversal shader. Skip compiling one if there are only monolithic raygen + * shaders. + */ + bool traversal_needed = !library && (!monolithic || raygen_imported); + if (!traversal_needed) return VK_SUCCESS; /* create traversal shader */ @@ -716,7 +726,10 @@ compile_rt_prolog(struct radv_device *device, struct radv_ray_tracing_pipeline * combine_config(config, &shader->config); } } - combine_config(config, &pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]->config); + + if (pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]) + combine_config(config, &pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]->config); + postprocess_rt_config(config, device->physical_device->rad_info.gfx_level, device->physical_device->rt_wave_size); }
